Manan Syal

According to our database1, Manan Syal authored at least 11 papers between 2003 and 2006.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
New techniques for untestable fault identification in sequential circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

A Study of Implication Based Pseudo Functional Testing.
Proceedings of the 2006 IEEE International Test Conference, 2006

2005
Static Learning for Problems in VLSI Test and Verification.
PhD thesis, 2005

Extended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

VERISEC: verifying equivalence of sequential circuits using SAT.
Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

Untestable fault identification through enhanced necessary value assignments.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

Untestable Multi-Cycle Path Delay Faults in Industrial Designs.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2004
Untestable Fault Identification using Recurrence Relations and Impossible Value Assignments.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Identifying Untestable Transition Faults in Latch Based Designs with Multiple Clocks.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003
Efficient Implication - Based Untestable Bridge Fault Identifier.
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

A Novel, Low-Cost Algorithm for Sequentially Untestable Fault Identification.
Proceedings of the 2003 Design, 2003


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