Manpreet Khaira

According to our database1, Manpreet Khaira authored at least 4 papers between 1991 and 1999.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

1999
Logic Verification of Very Large Circuits Using Shark.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1996
Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking.
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996

Word Level Model Checking - Avoiding the Pentium FDIV Error.
Proceedings of the 33st Conference on Design Automation, 1996

1991
Parallelizing a New Class of Large Applications over High-speed Networks.
Proceedings of the Third ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), 1991


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