Timothy Kam

According to our database1, Timothy Kam authored at least 23 papers between 1990 and 2012.

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Bibliography

2012
Energy-guided exploration of on-chip network design for exa-scale computing.
Proceedings of the International Workshop on System Level Interconnect Prediction, 2012

A study of the effectiveness of CPU consolidation in a virtualized multi-core server system.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012

2011
Automatic Pipelining From Transactional Datapath Specifications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Integrating formal verification and high-level processor pipeline synthesis.
Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011

OS-level power minimization under tight performance constraints in general purpose systems.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

2010
Automatic multithreaded pipeline synthesis from transactional datapath specifications.
Proceedings of the 47th Design Automation Conference, 2010

2008
A System Verilog Rewriting System for RTL Abstraction with Pentium Case Study.
Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

Correct-by-construction microarchitectural pipelining.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2006
Reducing Structural Bias in Technology Mapping.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2003
A new enhanced constructive decomposition and mapping algorithm.
Proceedings of the 40th Design Automation Conference, 2003

2002
Coordinated transformations for high-level synthesis of high performance microprocessor blocks.
Proceedings of the 39th Design Automation Conference, 2002

1999
Coverage Estimation for Symbolic Model Checking.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Formal verification of pipeline control using controlled token nets and abstract interpretation.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1997
Explicit and implicit algorithms for binate covering problems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Theory and algorithms for state minimization of nondeterministic FSMs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Implicit computation of compatible sets for state minimization of ISFSMs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996
Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking.
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996

1995
Comparing layouts with HDL models: a formal verification technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Implicit state minimization of non-deterministic FSMs.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994
A Fully Implicit Algorithm for Exact State Minimization.
Proceedings of the 31st Conference on Design Automation, 1994

HSIS: A BDD-Based Environment for Formal Verification.
Proceedings of the 31st Conference on Design Automation, 1994

1992
State machine abstraction from circuit layouts using BDD's: applications in verification and synthesis.
Proceedings of the conference on European design automation, 1992

1990
Algorithms for Discrete Function Manipulation.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990


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