Masakazu Kakumu

According to our database1, Masakazu Kakumu authored at least 5 papers between 1990 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2025
Dynamic Flash Memory Operation Experimentally Validated with 65nm SOI Technology.
Proceedings of the IEEE International Memory Workshop, 2025

2022
Dynamic Flash Memory with Fast Block Refresh.
Proceedings of the 20th Non-Volatile Memory Technology Symposium, 2022

1998
Multiobjective optimization of VLSI interconnect parameters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1996
Substrate noise influence on circuit performance in variable threshold-voltage scheme.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

1990
A 4-Mb CMOS SRAM with a PMOS thin-film-transistor load cell.
IEEE J. Solid State Circuits, October, 1990


  Loading...