Masoud Zamani

According to our database1, Masoud Zamani authored at least 13 papers between 2008 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2013
ILP formulations for variation/defect-tolerant logic mapping on crossbar nano-architectures.
ACM J. Emerg. Technol. Comput. Syst., 2013

2012
Ping-pong test: Compact test vector generation for reversible circuits.
Proceedings of the 30th IEEE VLSI Test Symposium, 2012

Reliable logic mapping on Nano-PLA architectures.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

2011
Self-timed nano-PLA.
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011

Variation-immune quasi delay-insensitive implementation on nano-crossbar arrays.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

Fault Masking and Diagnosis in Reversible Circuits.
Proceedings of the 16th European Test Symposium, 2011

Online Missing/Repeated Gate Faults Detection in Reversible Circuits.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

Templated-Based Asynchronous Design for Testable and Fail-Safe Operation.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

Variation-aware logic mapping for crossbar nano-architectures.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Online fault testing of reversible logic using dual rail coding.
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

A transient error tolerant self-timed asynchronous architecture.
Proceedings of the 15th European Test Symposium, 2010

Online Multiple Fault Detection in Reversible Circuits.
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2008
A novel test environment for template based QDI asynchronous circuits.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008


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