Hossein Pedram
Orcid: 0000-0002-2331-0568Affiliations:
- Amirkabir University of Technology, Tehran, Iran
According to our database1,
Hossein Pedram
authored at least 98 papers
between 2001 and 2022.
Collaborative distances:
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Bibliography
2022
Spectrum Sharing Among Multiple-Seller and Multiple-Buyer Operators of a Mobile Network: A Stochastic Geometry Approach.
IEEE Trans. Cogn. Commun. Netw., 2022
Stochastic Geometry Analysis of Spectrum Sharing Among Multiple Seller and Buyer Mobile Operators.
CoRR, 2022
Stochastic Geometry Analysis of Spectrum Sharing Among Seller and Buyer Mobile Operators.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2022
2021
IEEE Trans. Mob. Comput., 2021
Energy and task completion time trade-off for task offloading in fog-enabled IoT networks.
Pervasive Mob. Comput., 2021
SeaPlace: Process Variation Aware Placement for Reliable Combinational Circuits against SETs and METs.
CoRR, 2021
An accurate model to predict the performance of graphical processors using data mining and regression theory.
Comput. Electr. Eng., 2021
2020
A genetic algorithm-based tasks scheduling in multicore processors considering energy consumption.
Int. J. Embed. Syst., 2020
Joint subchannel assignment and power control in OFDMA in-band full-duplex heterogeneous networks.
Trans. Emerg. Telecommun. Technol., 2020
Energy-Efficient and delay-guaranteed computation offloading for fog-based IoT networks.
Comput. Networks, 2020
Comprehensive regression-based model to predict performance of general-purpose graphics processing unit.
Clust. Comput., 2020
2019
Energy-Efficient Resource Allocation in Heterogeneous Cloud Radio Access Networks via BBU Offloading.
IEEE Trans. Veh. Technol., 2019
Integer linear programming-based multi-objective scheduling for scientific workflows in multi-cloud environments.
J. Supercomput., 2019
Tier-aware joint subchannel and power allocation in uplink OFDMA heterogeneous networks.
Trans. Emerg. Telecommun. Technol., 2019
2018
Wirel. Networks, 2018
Integer linear programming-based cost optimization for scheduling scientific workflows in multi-cloud environments.
J. Supercomput., 2018
Efficient joint power and admission control in underlay cognitive networks using Benders' decomposition method.
Comput. Commun., 2018
2017
Targeted content dissemination in mobile social networks taking account of resource limitation.
Concurr. Comput. Pract. Exp., 2017
Proceedings of the 28th IEEE Annual International Symposium on Personal, 2017
2016
Wirel. Pers. Commun., 2016
Characterizing the SINRs region corresponding to a given target-rate in OFDMA networks.
Proceedings of the IEEE Symposium on Computers and Communication, 2016
2015
Microelectron. Reliab., 2015
Soft error rate estimation of combinational circuits based on vulnerability analysis.
IET Comput. Digit. Tech., 2015
Expert Syst. Appl., 2015
Gate Resizing for Soft Error Rate Reduction in Nano-scale Digital Circuits Considering Process Variations.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
2014
IGBDD: Intelligent Grid Based Data Dissemination Protocol for Mobile Sink in Wireless Sensor Networks.
Wirel. Pers. Commun., 2014
Software-Based Control Flow Checking Against Transient Faults in Industrial Environments.
IEEE Trans. Ind. Informatics, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2013
Statistical Functional Yield Estimation and Enhancement of CNFET-Based VLSI Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2013
J. Supercomput., 2013
Upper and lower bounds for dynamic cluster assignment for multi-target tracking in heterogeneous WSNs.
J. Parallel Distributed Comput., 2013
J. Netw. Comput. Appl., 2013
Design and Analysis of a Robust Carbon Nanotube-Based Asynchronous Primitive Circuit.
ACM J. Emerg. Technol. Comput. Syst., 2013
An Effective Control Flow Checking Method for Multitask Processing in harsh Environments.
J. Circuits Syst. Comput., 2013
KSII Trans. Internet Inf. Syst., 2013
Lifetime improvement of visual sensor networks for target coverage through uniform energy consumption.
Int. J. Ad Hoc Ubiquitous Comput., 2013
Merging and incentive-based techniques in hybrid clustering for multi-target tracking in Wireless Sensor Networks.
Proceedings of the International Conference on Computer, 2013
2012
Survey of mobile object tracking protocols in wireless sensor networks: a network-centric perspective.
Int. J. Ad Hoc Ubiquitous Comput., 2012
Proceedings of the Tenth Annual IEEE International Conference on Pervasive Computing and Communications, 2012
Proceedings of the 6th International Symposium on Telecommunications, 2012
Provisioning-Based Resource Management for Effective Workflow Scheduling on Utility Grids.
Proceedings of the 12th IEEE/ACM International Symposium on Cluster, 2012
2011
Investigation of transient fault effects in synchronous and asynchronous Network on Chip router.
J. Syst. Archit., 2011
Designing a self-organised system for service substitution and placement in wireless sensor networks.
IET Wirel. Sens. Syst., 2011
HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors.
Des. Autom. Embed. Syst., 2011
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Metallic-CNT and Non-uniform CNTs Tolerant Design of CNFET-based Circuits Using Independent N2-Transistor Structures.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Timing yield estimation of carbon nanotube-based digital circuits in the presence of nanotube density variation and metallic-nanotubes.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Proceedings of the European Wireless 2011, April 27-29, 2011, Vienna, Austria., 2011
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
2010
Microelectron. J., 2010
An Efficient Energy Estimation Methodology for Quasi Delay Insensitive Template-Based Asynchronous Circuits.
J. Low Power Electron., 2010
The Impact of Data Replicatino on Job Scheduling Performance in Hierarchical data Grid
CoRR, 2010
L-SYNC: Larger Degree Clustering Based Time-Synchronisation for Wireless Sensor Network.
Proceedings of the Eighth ACIS International Conference on Software Engineering Research, 2010
Proceedings of the 18th Euromicro Conference on Parallel, 2010
Statistical Leakage Power Optimization of Asynchronous Circuits Considering Process Variations.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
2009
Comput. Electr. Eng., 2009
High performance asynchronous design flow using a novel static performance analysis method.
Comput. Electr. Eng., 2009
Process Variation Aware Performance Analysis of Asynchronous Circuits Considering Spatial Correlation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
Statistical static performance analysis of asynchronous circuits considering process variation.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Proceedings of the International Conference on Ultra Modern Telecommunications, 2009
Proceedings of the 2009 International Conference on Computational Intelligence and Security, 2009
A Fault Injection Attitude based on Background Debug Mode in Embedded Systems.
Proceedings of the 2009 International Conference on Computer Design, 2009
2008
Automatic Generation of Globally Asynchronous Locally Synchronous Wrapper Circuits.
Int. J. Comput. Their Appl., 2008
Compensating Algorithmic-Loop Performance Degradation in Asynchronous Circuits Using Hardware Multi-threading.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
Reimbursing the Handshake Overhead of Asynchronous Circuits using Compiler Pre-Synthesis Optimizations.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Power Optimization of Asynchronous Circuits through Simultaneous Vdd and Vth Assignment and Template Sizing.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Proceedings of the Advances in Computer Science and Engineering, 2008
Proceedings of the Advances in Computer Science and Engineering, 2008
Proceedings of the Collaborative Computing: Networking, 2008
2007
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor.
Proceedings of the IFIP VLSI-SoC 2007, 2007
An Automatic Design Flow for Implementation of Side Channel Attacks Resistant Crypto-Chips.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
A Power Estimation Methodology for QDI Asynchronous Circuits based on High-Level Simulation.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Performance Evaluation of Asynchronous Circuits with Choice Using Abstract Probabilistic Timed Petri Nets.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Using standard asic back-end for qdi asynchronous circuits: dealing with isochronic fork constraint.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the International Symposium on System-on-Chip, 2006
Dynamic voltage and frequency management based on variable update intervals for frequency setting.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
2005
Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005
Asynchronous vs. Synchronous Design of RSA.
Proceedings of The 2005 International Conference on Embedded Systems and Applications, 2005
Proceedings of the Algorithmic Applications in Management, First International Conference, 2005
2003
Proceedings of the Integrated Circuit and System Design, 2003
Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction.
Proceedings of the 40th Design Automation Conference, 2003
2001
Proceedings of the Field-Programmable Logic and Applications, 2001