Matthias Bucher

According to our database1, Matthias Bucher authored at least 24 papers between 1995 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Design of Micropower Operational Transconductance Amplifiers for High Total Ionizing Dose Effects.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Forward and Reverse Operation of Enclosed-Gate MOSFETs and Sensitivity to High Total Ionizing Dose.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

An Improved Model for Circulating Bearing Currents in Inverter-Fed AC Machines.
Proceedings of the IEEE International Conference on Industrial Technology, 2019

Compact Modeling of Low Frequency Noise and Thermal Noise in Junction Field Effect Transistors.
Proceedings of the 49th European Solid-State Device Research Conference, 2019


2018
Extending a 65nm CMOS process design kit for high total ionizing dose effects.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

Investigation of Scaling and Temperature Effects in Total Ionizing Dose (TID) Experiments in 65 nm CMOS.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

A Compact Model for Static and Dynamic Operation of Symmetric Double-Gate Junction FETs.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017
Multi-objective Low-Noise Amplifier Optimization Using Analytical Model and Genetic Computation.
Circuits Syst. Signal Process., 2017

Optimization of RF low noise amplifier design using analytical model and genetic computation.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

2016
A comprehensive analysis of nanoscale single- and multi-gate MOSFETs.
Microelectron. J., 2016

N-1 security assessment incorporating the flexibility offered by dynamic line rating.
Proceedings of the Power Systems Computation Conference, 2016

Compact model for variability of low frequency noise due to number fluctuation effect.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015
FOSS EKV 2.6 parameter extractor.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

2014
Managing Flexibility in Multi-Area Power Systems.
CoRR, 2014

2013
Why- and how- to integrate Verilog-A compact models in SPICE simulators.
Int. J. Circuit Theory Appl., 2013

2012
Ultra-low voltage drain-bulk connected MOS transistors in weak and moderate inversion.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2007
Determining MOSFET Parameters in Moderate Inversion.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006
Inversion-Coefficient Based Design of RF CMOS Low-Noise Amplifiers.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2004
Analysis of harmonic distortion in deep submicron CMOS.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

2002
Re-interpreting the MOS transistor via the inversion coefficient and the continuum of g<sub>ms</sub>/I<sub>d</sub>.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Analysis of transconductances at all levels of inversion in deep submicron CMOS.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2000
Design-oriented characterization of CMOS over the continuum of inversion level and channel length.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

1995
Estimating Key Parameters in the EKV MOST Model for Analogue Desgin and Simulation.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995


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