Eric A. Vittoz

According to our database1, Eric A. Vittoz authored at least 31 papers between 1989 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019

2010
Low-Power Crystal and MEMS Oscillators - The Experience of Watch Developments
Integrated Circuits and Systems, Springer, ISBN: 978-90-481-9395-0, 2010

2008
Subthreshold Source-Coupled Logic Circuits for Ultra-Low-Power Applications.
IEEE J. Solid State Circuits, 2008

2007
On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation.
IEEE J. Solid State Circuits, 2007

Ultra low power subthreshold MOS current mode logic circuits using a novel load device concept.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

Current sensing completion detection for subthreshold asynchronous circuits.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation.
Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006

2002
Addition to "An analysis of flicker noise rejection in low-power and low-voltage CMOS mixers".
IEEE J. Solid State Circuits, 2002

2001
An ultralow-power UHF transceiver integrated in a standard digital CMOS process: architecture and receiver.
IEEE J. Solid State Circuits, 2001

An ultralow-power UHF transceiver integrated in a standard digital CMOS process: transmitter.
IEEE J. Solid State Circuits, 2001

An analysis of flicker noise rejection in low-power and low-voltage CMOS mixers.
IEEE J. Solid State Circuits, 2001

2000
Design of high-Q varactors for low-power wireless applications using a standard CMOS process.
IEEE J. Solid State Circuits, 2000

Tradeoffs and design of an ultra low power UHF transceiver integrated in a standard digital CMOS process.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

A low-power low-voltage transceiver architecture suitable for wireless distributed sensors network.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A 1 V, 1 mW, 434 MHz FSK receiver fully integrated in a standard digital CMOS process.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

A 1.2 V, 433 MHz, 10 dBm, 38% global efficiency FSK transmitter integrated in a standard digital CMOS process.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999
A 1.2V, 430MHz, 4dBm power amplifier and a 250muW front-end, using a standard digital CMOS process.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

1998
Analog VLSI for collective computation.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1997
An integrated cortical layer for orientation enhancement.
IEEE J. Solid State Circuits, 1997

Pseudo-Resistive Networks and their Applications to Analog Collective Computation.
Proceedings of the Artificial Neural Networks, 1997

1996
A Silicon Model of Amplitude Modulation Detection in the Auditory Brainstem.
Proceedings of the Advances in Neural Information Processing Systems 9, 1996

Analog VLSI solution to the stability study of power networks.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1995
A communication scheme for analog VLSI perceptive systems.
IEEE J. Solid State Circuits, June, 1995

A 12-transistor PFM demodulator for analog neural networks communication.
IEEE Trans. Neural Networks, 1995

Improved Silicon Cochlea using Compatible Lateral Bipolar Transistors.
Proceedings of the Advances in Neural Information Processing Systems 8, 1995

Linear predictive coding of speech using an analogue cochlear model.
Proceedings of the Fourth European Conference on Speech Communication and Technology, 1995

1994
Analog VLSI signal processing: Why, where, and how?
J. VLSI Signal Process., 1994

A communication architecture tailored for analog VLSI artificial neural networks: intrinsic performance and limitations.
IEEE Trans. Neural Networks, 1994

Forum: From 100 Milliwatts/MIPS to 10 Microwatts/MIPS.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Very Low Power Circuit Design: Fundamentals and Limits.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1989
CMOS Integration of Herault-Jutten Cells for Separation of Sources.
Proceedings of the Analog VLSI Implementation of Neural Systems, 1989


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