Ilias Chlis

According to our database, Ilias Chlis authored at least 11 papers between 2012 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET.

Jay Im, Kevin Zheng, Chuen-Huei Adam Chou, Lei Zhou, Jae Wook Kim, Stanley Chen, Yipeng Wang, Hao-Wei Hung, Kee Hian Tan, Winson Lin, Arianne Roldan, Declan Carey, Ilias Chlis, Ronan Casey, Ade Bekele, Ying Cao, David Mahashin, Hong Ahn, Hongtao Zhang, Yohan Frans, Ken Chang

IEEE J. Solid State Circuits, 2021

2020

6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET.

Jay Im, Kevin Zheng, Adam Chou, Lei Zhou, Jae Wook Kim, Stanley Chen, Yipeng Wang, Hao-Wei Hung, Kee Hian Tan, Winson Lin, Arianne Roldan, Declan Carey, Ilias Chlis, Ronan Casey, Ade Bekele, Ying Cao, David Mahashin, Hong Ahn, Hongtao Zhang, Yohan Frans, Ken Chang

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018

Transformer-Based Input Integrated Matching in Cascode Amplifiers: Analytical Proofs.

Domenico Pepe, Ilias Chlis, Domenico Zito

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET.

James Hudner, Declan Carey, Ronan Casey, Kay Hearne, Pedro Wilson de Abreu Farias Neto, Ilias Chlis, Marc Erett, Chi Fung Poon, Asma Laraba, Hongtao Zhang, Sai Lalith Chaitanya Ambatipudi, David Mahashin, Parag Upadhyaya, Yohan Frans, Ken Chang

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2017

Analyses and techniques for phase noise reduction in CMOS Hartley oscillator topology.

Ilias Chlis, Domenico Pepe, Domenico Zito

Int. J. Circuit Theory Appl., 2017

Transformer-coupled π-network differential CMOS oscillator circuit topology.

Ilias Chlis, Domenico Pepe, Domenico Zito

Int. J. Circuit Theory Appl., 2017

2016

67 GHz three-spiral transformer CMOS oscillator.

Domenico Pepe, Ilias Chlis, Domenico Zito

Int. J. Circuit Theory Appl., 2016

Phase noise analysis in CMOS differential Armstrong oscillator topology.

Ilias Chlis, Domenico Pepe, Domenico Zito

Int. J. Circuit Theory Appl., 2016

Analyses and techniques for phase noise reduction in CMOS Colpitts oscillator topology.

Ilias Chlis, Domenico Pepe, Domenico Zito

Int. J. Circuit Theory Appl., 2016

2015

Analysis of Phase Noise in 28 nm CMOS LC Oscillator Differential Topologies: Armstrong, Colpitts, Hartley and Common-Source Cross-Coupled Pair.

Ilias Chlis, Domenico Pepe, Domenico Zito

J. Circuits Syst. Comput., 2015

2012

Ultra-low voltage drain-bulk connected MOS transistors in weak and moderate inversion.

Athanasios Dimakos, Matthias Bucher, Rupendra Kumar Sharma, Ilias Chlis

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012