Meiting Xue

Orcid: 0000-0001-5207-0965

According to our database1, Meiting Xue authored at least 12 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Dual Cuckoo Filter with a Low False Positive Rate for Deep Packet Inspection.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., August, 2023

Reliable Long-Term Energy Load Trend Prediction Model for Smart Grid Using Hierarchical Decomposition Self-Attention Network.
IEEE Trans. Reliab., 2023

An Auto-Parallel Method for Deep Learning Models Based on Genetic Algorithm.
Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023

FedAG:A Federated Learning Method Based on Data Importance Weighted Aggregation.
Proceedings of the IEEE/CIC International Conference on Communications in China, 2023

Personalized Federated Learning for Fast Convergence and Local Adaption: A Double Gradient Descent Method.
Proceedings of the IEEE International Conference on High Performance Computing & Communications, 2023

2022
Resource Efficient Top-<i>K</i> Sorter on FPGA.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., September, 2022

AreaHash: A Balanced and fully scalable consistency hashing algorithm.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

Aware: Adaptive Distributed Training with Computation, Communication and Position Awareness for Deep Learning Model.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

2021
High-Parallelism Hash-Merge Architecture for Accelerating Join Operation on FPGA.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
FPGA-Accelerated Hash Join Operation for Relational Databases.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

High-Throughput Parallel SRAM-Based Hash Join Architecture on FPGA.
IEEE Trans. Circuits Syst., 2020

Sorting Matrix Architecture for Continuous Data Sequences.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020


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