Michael Fragano

According to our database1, Michael Fragano authored at least 4 papers between 2004 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
1.4Gsearch/s 2-Mb/mm<sup>2</sup> TCAM Using Two-Phase-Pre-Charge ML Sensing and Power-Grid Pre-Conditioning to Reduce Ldi/dt Power-Supply Noise by 50%.
IEEE J. Solid State Circuits, 2018

2017
12.4 1.4Gsearch/s 2Mb/mm<sup>2</sup> TCAM using two-phase-precharge ML sensing and power-grid preconditioning to reduce Ldi/dt power-supply noise by 50%.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2007
A 550ps Access-Time Compilable SRAM in 65nm CMOS Technology.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2004
BIST controlled variable sense amp timing for 90nm embedded SRAM.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004


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