Robert M. Houle

According to our database1, Robert M. Houle authored at least 8 papers between 1995 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
1.4Gsearch/s 2-Mb/mm<sup>2</sup> TCAM Using Two-Phase-Pre-Charge ML Sensing and Power-Grid Pre-Conditioning to Reduce Ldi/dt Power-Supply Noise by 50%.
IEEE J. Solid State Circuits, 2018

2017
12.4 1.4Gsearch/s 2Mb/mm<sup>2</sup> TCAM using two-phase-precharge ML sensing and power-grid preconditioning to reduce Ldi/dt power-supply noise by 50%.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2013
A 64Mb SRAM in 22nm SOI technology featuring fine-granularity power gating and low-energy power-supply-partition techniques for 37% leakage reduction.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability Enhancements.
IEEE J. Solid State Circuits, 2012

2011
A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2008
Simple Statistical Analysis Techniques to Determine Optimum Sense Amp Set Times.
IEEE J. Solid State Circuits, 2008

2007
Simple Statistical Analysis Techniques to Determine Minimum Sense Amp Set Times.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

1995
Digital delay line clock shapers and multipliers.
IBM J. Res. Dev., 1995


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