Igor Arsovski

According to our database, Igor Arsovski authored at least 13 papers between 2003 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

1.4Gsearch/s 2-Mb/mm² TCAM Using Two-Phase-Pre-Charge ML Sensing and Power-Grid Pre-Conditioning to Reduce Ldi/dt Power-Supply Noise by 50%.

Igor Arsovski, Akhilesh Patil, Robert M. Houle, Michael Fragano, Ramon Rodriguez, Raymond Kim, Van Butler

IEEE J. Solid State Circuits, 2018

2017

12.4 1.4Gsearch/s 2Mb/mm² TCAM using two-phase-precharge ML sensing and power-grid preconditioning to reduce Ldi/dt power-supply noise by 50%.

Igor Arsovski, Michael Fragano, Robert M. Houle, Akhilesh Patil, Van Butler, Raymond Kim, Ramon Rodriguez, Tom Maffitt, Joseph J. Oler, John Goss, Christopher Parkinson, Michael A. Ziegerhofer, Steven Burns

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2013

A 32 nm 0.58-fJ/Bit/Search 1-GHz Ternary Content Addressable Memory Compiler Using Silicon-Aware Early-Predict Late-Correct Sensing With Embedded Deep-Trench Capacitor Noise Mitigation.

Igor Arsovski, Travis Hebig, Daniel Dobson, Reid Wistort

IEEE J. Solid State Circuits, 2013

A 64Mb SRAM in 22nm SOI technology featuring fine-granularity power gating and low-energy power-supply-partition techniques for 37% leakage reduction.

Harold Pilo, Chad A. Adams, Igor Arsovski, Robert M. Houle, Steve Lamphier, Michael M. Lee, Frank Pavlik, Sushma N. Sambatur, Adnan Seferagic, Richard Wu, Mohammad Imran Younus

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Tail-Bit Tracking circuit with degraded VGS bit-cell mimic array for a 50% search-time and 200mV Vmin improvement in a Ternary Content Addressable Memory.

Igor Arsovski, Travis Hebig, John Goss, Paul Grzymkowski, Josh Patch

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability Enhancements.

Harold Pilo, Igor Arsovski, Kevin Batson, Geordie Braceras, John A. Gabric, Robert M. Houle, Steve Lamphier, Carl Radens, Adnan Seferagic

IEEE J. Solid State Circuits, 2012

1Gsearch/sec Ternary Content Addressable Memory compiler with silicon-aware Early-Predict Late-Correct single-ended sensing.

Igor Arsovski, Travis Hebig, Daniel Dobson, Reid Wistort

Proceedings of the Symposium on VLSI Circuits, 2012

2011

A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements.

Harold Pilo, Igor Arsovski, Kevin Batson, Geordie Braceras, John A. Gabric, Robert M. Houle, Steve Lamphier, Frank Pavlik, Adnan Seferagic, Liang-Yu Chen, Shang-Bin Ko, Carl Radens

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2006

Improved Match-Line Test and Repair Methodology Including Power-Supply Noise Testing for Content-Addressable Memories.

Rahul Nadkarni, Igor Arsovski, Reid Wistort, Valerie Chickanosky

Proceedings of the 2006 IEEE International Test Conference, 2006

Self-referenced sense amplifier for across-chip-variation immune sensing in high-performance Content-Addressable Memories.

Igor Arsovski, Reid Wistort

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

Low-noise embedded CAM with reduced slew-rate match-lines and asynchronous search-lines.

Igor Arsovski, Rahul Nadkarni

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003

A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories.

Igor Arsovski, Ali Sheikholeslami

IEEE J. Solid State Circuits, 2003

A ternary content-addressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme.

Igor Arsovski, Trevis Chandler, Ali Sheikholeslami

IEEE J. Solid State Circuits, 2003