Michael Thies

According to our database1, Michael Thies authored at least 27 papers between 1998 and 2023.

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Bibliography

2023
Overview and Comparison of Asset Information Model Standards.
IEEE Access, 2023

2021
A Reference Architecture for Modular Industrial Automation Systems.
Proceedings of the 26th IEEE International Conference on Emerging Technologies and Factory Automation, 2021

Generation of the Orchestrator Code for Skill-Based Automation Systems.
Proceedings of the 26th IEEE International Conference on Emerging Technologies and Factory Automation, 2021

2020
Benchmarking of Neuromorphic Hardware Systems.
Proceedings of the NICE '20: Neuro-inspired Computational Elements Workshop, 2020

Model Transformation for Asset Administration Shells.
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020

Benchmarking Deep Spiking Neural Networks on Neuromorphic Hardware.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2020, 2020

2019
Constraint Exploration of Convolutional Network Architectures with Neuroevolution.
Proceedings of the Advances in Computational Intelligence, 2019

Comparing Neuromorphic Systems by Solving Sudoku Problems.
Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019

2017
Binary Associative Memories as a Benchmark for Spiking Neuromorphic Hardware.
Frontiers Comput. Neurosci., 2017

2016
Performance estimation of streaming applications for hierarchical MPSoCs.
Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation, 2016

2011
Efficient mining of all margin-closed itemsets with applications in temporal knowledge discovery and classification by compression.
Knowl. Inf. Syst., 2011

2010
Runtime Reconfiguration of Multiprocessors Based on Compile-Time Analysis.
ACM Trans. Reconfigurable Technol. Syst., 2010

A Framework for the Design Space Exploration of Software-Defined Radio Applications.
Proceedings of the Mobile Lightweight Wireless Systems, 2010

2009
A Synchronization Method for Register Traces of Pipelined Processors.
Proceedings of the Analysis, 2009

2006
Modeling timbre distance with temporal statistics from polyphonic music.
IEEE Trans. Speech Audio Process., 2006

Application-Driven Development of Concurrent Packet Processing Platforms.
Proceedings of the Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 2006

2004
Network Application Driven Instruction Set Extensions for Embedded Processing Clusters.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004

Feedback driven instruction-set extension.
Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004

2003
BUILDABONG: A Framework for Architecture/Compiler Co-Exploration for ASIPs.
J. Circuits Syst. Comput., 2003

A holistic methodology for network processor design.
Proceedings of the 28th Annual IEEE Conference on Local Computer Networks (LCN 2003), 2003

2002
Combining static analysis of Java libraries with dynamic optimization.
PhD thesis, 2002

Annotating Java libraries in support of whole-program optimization.
Proceedings of the naugural International Symposium on Principles and Practice of Programming in Java, 2002

Efficient architecture/compiler co-exploration for ASIPs.
Proceedings of the International Conference on Compilers, 2002

2001
Design space characterization for architecture/compiler co-exploration.
Proceedings of the 2001 International Conference on Compilers, 2001

1999
A Closer Look at Inter-library Dependencies in Java-Software.
Proceedings of the JIT '99, 1999

1998
Statische Analyse von Bibliotheken als Grundlage dynamischer Optimierung.
Proceedings of the JIT '98, 1998

VLIW Compilation Techniques for Superscalar Architectures.
Proceedings of the Compiler Construction, 7th International Conference, 1998


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