Mustafa Celik

According to our database, Mustafa Celik authored at least 16 papers between 1996 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Cascade Control of SATCOM on the Move (SOTM) Antennas with Jacobian Operator.

Mustafa Celik, Oguz Kaan Hancioglu, Seta Bogosyan, Michal Bastl, Jan Najman, Robert Grepl

Proceedings of the 7th International Conference on Control, Mechatronics and Automation, 2019

System Identification-Based Dynamics Control for X-Y Pedestal Satellite Antenna.

Baris Aykent, Kadir Koca, Mustafa Celik

Proceedings of the 7th International Conference on Control, Mechatronics and Automation, 2019

2009

Parametric analysis to determine accurate interconnect extraction corners for design performance.

Ayhan A. Mutlu, Jiayong Le, Ruben Molina, Mustafa Celik

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

A parametric approach for handling local variation effects in timing analysis.

Ayhan A. Mutlu, Jiayong Le, Ruben Molina, Mustafa Celik

Proceedings of the 46th Design Automation Conference, 2009

2008

Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations.

Xin Li, Jiayong Le, Mustafa Celik, Lawrence T. Pileggi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007

An Exploratory Study on Statistical Timing Analysis and Parametric Yield Optimization.

Ayhan A. Mutlu, Kelvin J. Le, Mustafa Celik, Dar-sun Tsien, Garry Shyu, Long-Ching Yeh

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2005

Defining statistical sensitivity for timing optimization of logic circuits with large-scale process and environmental variations.

Xin Li, Jiayong Le, Mustafa Celik, Lawrence T. Pileggi

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2001

Min/max On-Chip Inductance Models and Delay Metrics.

Yi-Chang Lu, Mustafa Celik, Tak Young, Lawrence T. Pileggi

Proceedings of the 38th Design Automation Conference, 2001

A fast analytical technique for estimating the bounds of on-chip clock wire inductance.

Yi-Chang Lu, Kaustav Banerjee, Mustafa Celik, Robert W. Dutton

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

1999

Metrics and bounds for phase delay and signal attenuation in RC(L)clock trees.

Mustafa Celik, Lawrence T. Pileggi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Practical considerations for passive reduction of RLC circuits.

Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric.

Emrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1998

PRIMA: passive reduced-order interconnect macromodeling algorithm.

Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997

Simulation of multiconductor transmission lines using Krylov subspace order-reduction techniques.

Mustafa Celik, Andreas C. Cangellaris

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

SPIE: Sparse Partial Inductance Extraction.

Zhijiang He, Mustafa Celik, Lawrence T. Pileggi

Proceedings of the 34st Conference on Design Automation, 1997

1996

A general dispersive multiconductor transmission line model for interconnect simulation in SPICE.

Mustafa Celik, Andreas C. Cangellaris

Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996