Robert W. Dutton

According to our database1, Robert W. Dutton authored at least 66 papers between 1981 and 2011.

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Bibliography

2011
Self-Tuning for Maximized Lifetime Energy-Efficiency in the Presence of Circuit Aging.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2011

Gate-controlled field-effect diodes and silicon-controlled rectifier for charged-device model ESD protection in advanced SOI technology.
Microelectronics Reliability, 2011

2010
Circuit-Based Characterization of Device Noise Using Phase Noise Data.
IEEE Trans. on Circuits and Systems, 2010

ESD Design Strategies for High-Speed Digital and RF Circuits in Deeply Scaled Silicon Technologies.
IEEE Trans. on Circuits and Systems, 2010

Optimized self-tuning for circuit aging.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
ESD design challenges and strategies in deeply-scaled integrated circuits.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Hybrid Integration of Bandgap Reference Circuits Using Silicon ICs and Germanium Devices.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007
A Built-in Technique for Measuring Substrate and Power-Supply Digital Switching Noise Using PMOS-Based Differential Sensors and a Waveform Sampler in System-on-Chip Applications.
IEEE Trans. Instrumentation and Measurement, 2007

RF ESD protection strategies: Codesign vs. low-C protection.
Microelectronics Reliability, 2007

A Circuit-Based Noise Parameter Extraction Technique for MOSFETs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Post-breakdown leakage resistance and its dependence on device area.
Microelectronics Reliability, 2006

2005
An analytical formulation of phase noise of signals with Gaussian-distributed jitter.
IEEE Trans. on Circuits and Systems, 2005

Synthesized compact model and experimental results for substrate noise coupling in lightly doped processes.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
Modeling of Wave Behavior of Substrate Noise Coupling for Mixed-Signal IC Design.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Synthesized Compact Models (SCM) of Substrate Noise Coupling Analysis and Synthesis in Mixed-Signal ICs.
Proceedings of the 2004 Design, 2004

2003
A CAD-Oriented Modeling Approach of Frequency-Dependent Behavior of Substrate Noise Coupling for Mixed-Signal IC Design.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

2002
Accurate Model of Metal-Insulator-Semiconductor Interconnects.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

AC Analysis of Thin Gate Oxide MOS with Quantum Mechanical Corrections.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

2001
A Software Framework for Creating Patient Specific Geometric Models from Medical Imaging Data for Simulation Based Medical Planning of Vascular Surgery.
Proceedings of the Medical Image Computing and Computer-Assisted Intervention, 2001

Analysis and Design of ESD Protection Circuits for High-Frequency/RF Applications.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

Will Nanotechnology Change the Way We Design and Verify Systems? (Panel).
ICCAD, 2001

2000
Perspectives on technology and technology-driven CAD.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

Full Chip Thermal Simulation.
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

1999
Comprehensive Static Characterization of Vertical Electrostatically Actuated Polysilicon Beams.
IEEE Design & Test of Computers, 1999

1998
Second Order Newton Iteration Method and Its Application to MOS Compact Modeling and Circuit Simulation.
VLSI Design, 1998

Observation of Anomalous Negative Differential Resistance in Diode Breakdown Simulation Using Carrier Temperature Dependent Impact Ionization.
VLSI Design, 1998

Modeling of Poly-Silicon Carrier Transport with Explicit Treatment of Grains and Grain Boundaries.
VLSI Design, 1998

Hierarchical Process Simulation for Nano-Electronics.
VLSI Design, 1998

1996
Simulation of the hydrodynamic device model on distributed memory parallel computers.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

1995
A Methodology for Parallelizing PDE Solvers: Application to Semiconductor Device Simulation.
Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, 1995

Relaxation-based harmonic balance technique for semiconductor device simulation.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994
An automatic biasing scheme for tracing arbitrarily shaped I-V curves.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

1993
Modeling of the charge balance condition on floating gates and simulation of EEPROMs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1993

1992
An approach to construct pre-conditioning matrices for block iteration of linear equations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

A utility-based integrated system for process simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

1991
A STRIDE towards practical 3-D device simulation-numerical and visualization considerations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

Linking TCAD to EDA - Benefits and Issues.
Proceedings of the 28th Design Automation Conference, 1991

1990
A nonequilibrium one-dimensional quantum-mechanical simulation for AlGaAs/GaAs HEMT structures.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

'Defensive programming' in the rapid development of a parallel scientific program.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

1989
Improvement in norm-reducing Newton methods for circuit simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

New approaches in a 3-D one-carrier device solver.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

Two-dimensional transient analysis of a collector-up ECL inverter.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

Two-dimensional analysis of a merged BiPMOS device.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

Modeling of the distributed gate RC effect in MOSFET's.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

Improved physical modeling of submicron MOSFETs based on parameter extraction using 2-D simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

The impact of supercomputing capabilities on U.S. materials science and technology.
Future Generation Comp. Syst., 1989

A manufacturing-oriented environment for synthesis of fabrication processes.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988
Algorithms for optimizing, two-dimensional symbolic layout compaction.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

Methodology for submicron device model development.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

Verification of analytic point defect models using SUPREM-IV [dopant diffusion].
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

The efficient simulation of coupled point defect and impurity diffusion.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

Hot carrier transport effect in Schottky-barrier diode grown by MBE.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

PISCES-MC: a multiwindow, multimethod 2-D device simulator.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

1987
An Extension to Newton's Method in Device Simulators--On An Efficient Algorithm to Evaluate Small-Signal Parameters and to Predict Initial Guess.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987

Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987

1986
A Best-First Search Algorithm for Optimal PLA Folding.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1986

1985
An Approach to Solving Multiparticle Diffusion Exhibiting Nonlinear Stiff Coupling.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985

Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985

Iterative Methods in Semiconductor Device Simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985

Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985

An analytical algorithm for placement of arbitrarily sized rectangular blocks.
Proceedings of the 22nd ACM/IEEE conference on Design automation, 1985

1983
Resistance Extraction from Mask Layout Data.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1983

1982
Modeling Latch-Up in CMOS Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1982

1981
Government interest and involvement in design automation development (Panel Discussion).
Proceedings of the 18th Design Automation Conference, 1981

Position statement - tools for design automation from a university point of view.
Proceedings of the 18th Design Automation Conference, 1981


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