Xin Li

Affiliations:
  • Duke University, Department of Electrical and Computer Engineering, Durham, NC, USA
  • Carnegie Mellon University, Center for Silicon System Implementation, Pittsburgh, PA, USA (PhD 2005)
  • Fudan University, Shanghai, China (former)


According to our database1, Xin Li authored at least 171 papers between 2001 and 2021.

Collaborative distances:

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Bibliography

2021
Guest Editorial: Cloud-Edge Computing for Cyber-Physical Systems and Internet of Things.
IEEE Trans. Ind. Informatics, 2021

A Survey on Edge and Edge-Cloud Computing Assisted Cyber-Physical Systems.
IEEE Trans. Ind. Informatics, 2021

Black-Box Test-Cost Reduction Based on Bayesian Network Models.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Board-Level Functional Fault Identification Using Streaming Data.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Facial Expression Recognition with Identity and Emotion Joint Learning.
IEEE Trans. Affect. Comput., 2021

Unsupervised Root-Cause Analysis with Transfer Learning for Integrated Systems.
Proceedings of the 39th IEEE VLSI Test Symposium, 2021

2020
Analog/RF Post-silicon Tuning via Bayesian Optimization.
ACM Trans. Design Autom. Electr. Syst., 2020

Fine-grained Adaptive Testing Based on Quality Prediction.
ACM Trans. Design Autom. Electr. Syst., 2020

Partial Bayesian Co-training for Virtual Metrology.
IEEE Trans. Ind. Informatics, 2020

Efficient Statistical Analysis for Correlated Rare Failure Events via Asymptotic Probability Approximation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Efficient Rare Failure Analysis Over Multiple Corners via Correlated Bayesian Inference.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Big Data for Cyber-Physical Systems.
IEEE Trans. Big Data, 2020

Unsupervised Root-Cause Analysis for Integrated Systems.
Proceedings of the IEEE International Test Conference, 2020

Efficient Classification via Partial Co-Training for Virtual Metrology.
Proceedings of the 25th IEEE International Conference on Emerging Technologies and Factory Automation, 2020

2019
Dependable Visual Light-Based Indoor Localization with Automatic Anomaly Detection for Location-Based Service of Mobile Cyber-Physical Systems.
ACM Trans. Cyber Phys. Syst., 2019

Graph-Constrained Sparse Performance Modeling for Analog Circuit Optimization via SDP Relaxation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Guest Editors' Introduction: Hardware and Algorithms for Energy-Constrained On-Chip Machine Learning (Part 2).
ACM J. Emerg. Technol. Comput. Syst., 2019

Guest Editors' Introduction to the Special Section on Hardware and Algorithms for Energy-Constrained On-chip Machine Learning.
ACM J. Emerg. Technol. Comput. Syst., 2019

Black-Box Test-Coverage Analysis and Test-Cost Reduction Based on a Bayesian Network Model.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Knowledge Transfer in Board-Level Functional Fault Identification using Domain Adaptation.
Proceedings of the IEEE International Test Conference, 2019

2018
Guest Editorial Circuit and System Design Automation for Internet of Things.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Efficient Hierarchical Performance Modeling for Analog and Mixed-Signal Circuits via Bayesian Co-Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Identifying Wafer-Level Systematic Failure Patterns via Unsupervised Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Design Automation for Cyber-Physical Systems [Scanning the Issue].
Proc. IEEE, 2018

Guest Editors' Introduction: Frontiers of Hardware and Algorithms for On-chip Learning.
ACM J. Emerg. Technol. Comput. Syst., 2018

Environment-Adaptable Fast Multi-Resolution (EAF-MR) optimization in large-scale RF-FPGA systems.
EURASIP J. Wirel. Commun. Netw., 2018

Intelligent corner synthesis via cycle-consistent generative adversarial networks for efficient validation of autonomous driving systems.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
High-Dimensional and Multiple-Failure-Region Importance Sampling for SRAM Yield Analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Guest Editorial: Special Issue on Smart Homes, Buildings and Infrastructures.
ACM Trans. Cyber Phys. Syst., 2017

C-YES: An Efficient Parametric Yield Estimation Approach for Analog and Mixed-Signal Circuits Based on Multicorner-Multiperformance Correlations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Machine Learning for Noise Sensor Placement and Full-Chip Voltage Emergency Detection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

DFM Evaluation Using IC Diagnosis Data.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Guest Editors' Introduction: Hardware and Algorithms for On-Chip Learning.
ACM J. Emerg. Technol. Comput. Syst., 2017

Algorithm and hardware implementation for visual perception system in autonomous vehicle: A survey.
Integr., 2017

Impact of circuit-level non-idealities on vision-based autonomous driving systems.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Efficient programming of reconfigurable radio frequency (RF) systems.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Partial co-training for virtual metrology.
Proceedings of the 22nd IEEE International Conference on Emerging Technologies and Factory Automation, 2017

Correlated Rare Failure Analysis via Asymptotic Probability Evaluation.
Proceedings of the 54th Annual Design Automation Conference, 2017

Efficient Hierarchical Performance Modeling for Integrated Circuits via Bayesian Co-Learning.
Proceedings of the 54th Annual Design Automation Conference, 2017

Session 13 - Security circuits and systems.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
Bayesian Model Fusion: Large-Scale Performance Modeling of Analog and Mixed-Signal Circuits by Reusing Early-Stage Data.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Harvesting Design Knowledge From the Internet: High-Dimensional Performance Tradeoff Modeling for Large-Scale Analog Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Efficient Hybrid Performance Modeling for Analog Circuits Using Hierarchical Shrinkage Priors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Modeling Random Telegraph Noise as a Randomness Source and its Application in True Random Number Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Decoding Brain States Based on Magnetoencephalography From Prespecified Cortical Regions.
IEEE Trans. Biomed. Eng., 2016

Energy-Constrained Distributed Learning and Classification by Exploiting Relative Relevance of Sensors' Data.
IEEE J. Sel. Areas Commun., 2016

Editorial: Special Issue on The 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics 2015).
Integr., 2016

Guest Editorial Emerging Memories - Technology, Architecture and Applications (Second Issue).
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Guest Editorial Emerging Memories - Technology, Architecture and Applications (First Issue).
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Overview of Circuits, Systems, and Applications of Spintronics.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Diagnostic resolution improvement through learning-guided physical failure analysis.
Proceedings of the 2016 IEEE International Test Conference, 2016

Efficient analog circuit optimization using sparse regression and error margining.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Virtual temperature measurement for smart buildings via Bayesian model fusion.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Identifying systematic spatial failure patterns through wafer clustering.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Overview of cyber-physical temperature estimation in smart buildings: From modeling to measurements.
Proceedings of the IEEE Conference on Computer Communications Workshops, 2016

Efficient statistical analysis for correlated rare failure events via asymptotic probability approximation.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Efficient statistical validation of machine learning systems for autonomous driving.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Efficient spatial variation modeling via robust dictionary learning.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Correlated Bayesian Model Fusion: efficient performance modeling of large-scale tunable analog/RF integrated circuits.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Efficient performance modeling of analog integrated circuits via kernel density based sparse regression.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Energy efficient learning and classification for distributed sensing.
Proceedings of the 8th International Conference on Communication Systems and Networks, 2016

Re-thinking polynomial optimization: Efficient programming of reconfigurable radio frequency (RF) systems by convexification.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Efficient Transient Analysis of Power Delivery Network With Clock/Power Gating by Sparse Approximation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Fast Statistical Analysis of Rare Circuit Failure Events via Scaled-Sigma Sampling for High-Dimensional Variation Space.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Co-Learning Bayesian Model Fusion: Efficient Performance Modeling of Analog and Mixed-Signal Circuits Using Side Information.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

From Robust Chip to Smart Building: CAD Algorithms and Methodologies for Uncertainty Analysis of Building Performance.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Statistical Learning in Chip (SLIC).
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Phase Noise Impairment and Environment-Adaptable Fast (EAF) Optimization for Programming of Reconfigurable Radio Frequency (RF) Receivers.
Proceedings of the 2015 IEEE Global Communications Conference, 2015

A fast spatial variation modeling algorithm for efficient test cost reduction of analog/RF circuits.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Efficient bit error rate estimation for high-speed link by Bayesian model fusion.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

mTunes: efficient post-silicon tuning of mixed-signal/RF integrated circuits based on Markov decision process.
Proceedings of the 52nd Annual Design Automation Conference, 2015

A statistical methodology for noise sensor placement and full-chip voltage map generation.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Efficient multivariate moment estimation via Bayesian model fusion for analog and mixed-signal circuits.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Fast statistical analysis of rare circuit failure events via Bayesian scaled-sigma sampling for high-dimensional variation space.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

Accurate passivity-enforced macromodeling for RF circuits via iterative zero/pole update based on measurement data.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Fast statistical analysis of rare failure events for memory circuits in high-dimensional variation space.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

SIPredict: Efficient post-layout waveform prediction via System Identification.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Multiple-Population Moment Estimation: Exploiting Interpopulation Correlation for Efficient Moment Estimation in Analog/Mixed-Signal Validation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Adaptive Circuit Design Methodology and Test Applied to Millimeter-Wave Circuits.
IEEE Des. Test, 2014

Multiple-Population Moment Estimation: Exploiting Inter-Population Correlation for Efficient Moment Estimation in Analog/Mixed-Signal Validation.
CoRR, 2014

Bayesian model fusion: Enabling test cost reduction of analog/RF circuits via wafer-level spatial variation modeling.
Proceedings of the 2014 International Test Conference, 2014

Ultra-low-power biomedical circuit design and optimization: Catching the don't cares.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

DALM-SVD: Accelerated sparse coding through singular value decomposition of the dictionary.
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

MPME-DP: multi-population moment estimation via dirichlet process for efficient validation of analog/mixed-signal circuits.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Fast statistical analysis of rare circuit failure events via subset simulation in high-dimensional variation space.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Verification based ECG biometrics with cardiac irregular conditions using heartbeat level and segment level information fusion.
Proceedings of the IEEE International Conference on Acoustics, 2014

Joint invariant estimation of RF impairments for reconfigurable Radio Frequency(RF) front-end.
Proceedings of the 2014 IEEE GLOBECOM Workshops, Austin, TX, USA, December 8-12, 2014, 2014

BMF-BD: Bayesian Model Fusion on Bernoulli Distribution for Efficient Yield Estimation of Integrated Circuits.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Computer-Aided Design of Machine Learning Algorithm: Training Fixed-Point Classifier for On-Chip Low-Power Implementation.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Toward efficient programming of reconfigurable radio frequency (RF) receivers.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

Using relative-relevance of data pieces for efficient communication, with an application to Neural data acquisition.
Proceedings of the 52nd Annual Allerton Conference on Communication, 2014

2013
Efficient Spatial Pattern Analysis for Variation Decomposition Via Robust Sparse Regression.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing.
IEEE J. Solid State Circuits, 2013

Formal verification of phase-locked loops using reachability analysis and continuization.
Commun. ACM, 2013

Referee consensus: a platform technology for nonlinear optimization.
Proceedings of the Extreme Science and Engineering Discovery Environment: Gateway to Discovery, 2013

PADRE: Physically-Aware Diagnostic Resolution Enhancement.
Proceedings of the 2013 IEEE International Test Conference, 2013

Test data analytics - Exploring spatial and test-item correlations in production test data.
Proceedings of the 2013 IEEE International Test Conference, 2013

Bayesian model fusion: a statistical framework for efficient pre-silicon validation and post-silicon tuning of complex analog and mixed-signal circuits.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

DREAMS: DFM rule EvAluation using manufactured silicon.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Automatic clustering of wafer spatial signatures.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Efficient moment estimation with extremely small sample size via bayesian inference for analog/mixed-signal validation.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Indirect performance sensing for on-chip analog self-healing via Bayesian model fusion.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

Structure-aware high-dimensional performance modeling for analog and mixed-signal circuits.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
Efficient SRAM Failure Rate Prediction via Gibbs Sampling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Verify level control criteria for multi-level cell flash memories and their applications.
EURASIP J. Adv. Signal Process., 2012

Spatial variation decomposition via sparse regression.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

Efficient parametric yield estimation of analog/mixed-signal circuits via Bayesian model fusion.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Post-silicon performance modeling and tuning of analog/mixed-signal circuits via Bayesian Model Fusion.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

An information-theoretic framework for optimal temperature sensor allocation and full-chip thermal monitoring.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Statistical design and optimization for adaptive post-silicon tuning of MEMS filters.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Large-scale statistical performance modeling of analog and mixed-signal circuits.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

A learning-based autoregressive model for fast transient thermal analysis of chip-multiprocessors.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Test cost reduction through performance prediction using virtual probe.
Proceedings of the 2011 IEEE International Test Conference, 2011

Toward efficient spatial variation decomposition via sparse regression.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Efficient incremental analysis of on-chip power grid via sparse approximation.
Proceedings of the 48th Design Automation Conference, 2011

Rethinking memory redundancy: optimal bit cell repair for maximum-information storage.
Proceedings of the 48th Design Automation Conference, 2011

Efficient SRAM failure rate prediction via Gibbs sampling.
Proceedings of the 48th Design Automation Conference, 2011

Indirect phase noise sensing for self-healing voltage controlled oscillators.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
Finding Deterministic Solution From Underdetermined Equation: Large-Scale Performance Variability Modeling of Analog/RF Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Real-Time Robust Signal Space Separation for Magnetoencephalography.
IEEE Trans. Biomed. Eng., 2010

Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Maximum-information storage system: Concept, implementation and application.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Bayesian virtual probe: minimizing variation characterization cost for nanoscale IC technologies via Bayesian inference.
Proceedings of the 47th Design Automation Conference, 2010

Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression.
Proceedings of the 47th Design Automation Conference, 2010

2009
Regular Analog/RF Integrated Circuits Design Using Optimization With Recourse Including Ellipsoidal Uncertainty.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Efficient statistical analysis of read timing failures in SRAM circuits.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Virtual probe: A statistically optimal framework for minimum-cost silicon characterization of nanoscale integrated circuits.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Efficient design-specific worst-case corner extraction for integrated circuits.
Proceedings of the 46th Design Automation Conference, 2009

SRAM parametric failure analysis.
Proceedings of the 46th Design Automation Conference, 2009

Finding deterministic solution from underdetermined equation: large-scale performance modeling by least angle regression.
Proceedings of the 46th Design Automation Conference, 2009

2008
Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS.
Proc. IEEE, 2008

Projection-Based Piecewise-Linear Response Surface Modeling for Strongly Nonlinear VLSI Performance Variations.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Statistical regression for efficient high-dimensional modeling of analog and mixed-signal performance variations.
Proceedings of the 45th Design Automation Conference, 2008

Mismatch analysis and statistical design at 65 nm and below.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Variation-tolerant SRAM sense-amplifier timing using configurable replica bitlines.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Asymptotic Probability Extraction for Nonnormal Performance Distributions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Robust Analog/RF Circuit Design With Projection-Based Performance Modeling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Parameterized Macromodeling for Analog System-Level Design Exploration.
Proceedings of the 44th Design Automation Conference, 2007

Efficient Parametric Yield Extraction for Multiple Correlated Non-Normal Performance Distributions of Analog/RF Circuits.
Proceedings of the 44th Design Automation Conference, 2007

2006
Statistical Performance Modeling and Optimization.
Found. Trends Electron. Des. Autom., 2006

Projection-based statistical analysis of full-chip leakage power with non-log-normal distributions.
Proceedings of the 43rd Design Automation Conference, 2006

Architecture-aware FPGA placement using metric embedding.
Proceedings of the 43rd Design Automation Conference, 2006

Active On-Die Suppression of Power Supply Noise.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
Performance-centering optimization for system-level analog design exploration.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Projection-based performance modeling for inter/intra-die variations.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variations.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Defining statistical sensitivity for timing optimization of logic circuits with large-scale process and environmental variations.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction.
Proceedings of the 2005 Design, 2005

Correlation-aware statistical timing analysis with non-gaussian delay distributions.
Proceedings of the 42nd Design Automation Conference, 2005

OPERA: optimization with ellipsoidal uncertainty for robust analog IC design.
Proceedings of the 42nd Design Automation Conference, 2005

2004
Asymptotic probability extraction for non-normal distributions of circuit performance.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Robust analog/RF circuit design with projection-based posynomial modeling.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

A frequency relaxation approach for analog/RF system-level simulation.
Proceedings of the 41th Design Automation Conference, 2004

STAC: statistical timing analysis with correlation.
Proceedings of the 41th Design Automation Conference, 2004

2003
Behavioral modeling for analog system-level simulation by wavelet collocation method.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Noise Macromodel for Radio Frequency Integrated Circuits.
Proceedings of the 2003 Design, 2003

Analog and RF circuit macromodels for system-level analysis.
Proceedings of the 40th Design Automation Conference, 2003

A frequency separation macromodel for system-level simulation of RF circuits.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Wavelet method for high-speed clock tree simulation.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
A wavelet balance approach for steady-state analysis of nonlinear circuits.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Behavioral Modeling of Analog Circuits by Wavelet Collocation Method.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

The autocorrelation matching method for distributed MIMO communications over unknown FIR channels.
Proceedings of the IEEE International Conference on Acoustics, 2001


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