Nailong He

According to our database1, Nailong He authored at least 8 papers between 2021 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A novel divided RESURF technology with high-side zero-bias pinch-off JFET and its experiments.
Microelectron. J., 2026

SOA expansion and reliability enhancement of 700V LDMOS: Experimental characterization and mechanism validation.
Microelectron. J., 2026

Display brightness perception model based on luminance spatial distribution.
Displays, 2026

2024
High Sensitivity Lateral Hall Device in Silicon on Insulator (SOI) Platform.
Proceedings of the 2024 IEEE SENSORS, Kobe, Japan, October 20-23, 2024, 2024

A Rugged 1200V P-channel LDMOS in Bipolar-CMOS-DMOS Process with Global Potential Control Technology.
Proceedings of the IEEE International Conference on Integrated Circuits, 2024

2023
A 400-V Half Bridge Gate Driver for Normally-Off GaN HEMTs With Effective Dv/Dt Control and High Dv/Dt Immunity.
IEEE Trans. Ind. Electron., 2023

2021
Device and Circuit Design for Improving the Freewheeling Characteristics of High Voltage Monolithic Integrated Circuit.
IEEE Trans. Ind. Electron., 2021

Study and Implementation of 600-V High-Voltage Gate Driver IC With the Common-Mode Dual-Interlock Technique for GaN Devices.
IEEE Trans. Ind. Electron., 2021


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