Naushad Alam

Orcid: 0000-0002-1636-7080

According to our database1, Naushad Alam authored at least 29 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
Memento: a prototype search engine for LSC 2021.
Multim. Tools Appl., October, 2023

Comparing Interactive Retrieval Approaches at the Lifelog Search Challenge 2021.
IEEE Access, 2023

Memento 3.0: An Enhanced Lifelog Search Engine for LSC'23.
Proceedings of the 6th Annual ACM Lifelog Search Challenge, 2023

2022
Memento 2.0: An Improved Lifelog Search Engine for LSC'22.
Proceedings of the LSC@ICMR 2022: Proceedings of the 5th Annual on Lifelog Search Challenge, Newark, NJ, USA, June 27, 2022

An Exploration into the Benefits of the CLIP model for Lifelog Retrieval.
Proceedings of the CBMI 2022: International Conference on Content-based Multimedia Indexing, Graz, Austria, September 14, 2022

2021
Radiation Hardened Area-Efficient 10T SRAM Cell for Space Applications.
Proceedings of the 25th International Symposium on VLSI Design and Test, 2021

Memento: A Prototype Lifelog Search Engine for LSC'21.
Proceedings of the 4th Annual on Lifelog Search Challenge, 2021

2020
Design of CNTFET-Based CCII Using gm/ID Technique for Low-Voltage and Low-Power Applications.
J. Circuits Syst. Comput., 2020

Design approach to improve the performance of JAMFETs.
IET Circuits Devices Syst., 2020

Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation.
IET Circuits Devices Syst., 2020

FPGA and ASIC Implementation and Comparison of Multipliers.
Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

2019
Compact and Low Power 11T-2MTJ Non-Volatile Ternary Content Addressable Memory Cell with High Sense Margin.
J. Low Power Electron., 2019

Pocket engineered electrostatically doped tunnel field effect transistor.
Proceedings of the TENCON 2019, 2019

2018
UTBB FD-SOI Circuit Design using Multifinger Transistors: A Circuit-Device Interaction Perspective.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

Compact and Reliable Low Power Non-Volatile TCAM Cell.
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018

2017
Low Leakage Single Bitline 9 T (SB9T) Static Random Access Memory.
Microelectron. J., 2017

2016
Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization.
Microelectron. J., 2016

2015
Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2014
Efficient ECSM Characterization Considering Voltage, Temperature, and Mechanical Stress Variability.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

An Analytical Delay Model for Mechanical Stress Induced Systematic Variability Analysis in Nanoscale Circuit Design.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

An analytical delay model for CMOS Inverter-Transmission Gate structure.
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

2013
The impact of process-induced mechanical stress in narrow width devices and variable-taper CMOS buffer design.
Microelectron. Reliab., 2013

The impact of process-induced mechanical stress on CMOS buffer design using multi-fingered devices.
Microelectron. Reliab., 2013

2012
Impact of Dummy Poly on the Process-Induced Mechanical Stress Enhanced Circuit Performance.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

Process induced mechanical stress aware poly-pitch optimization for enhanced circuit performance.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

The Impact of Process-Induced Mechanical Stress in Narrow Width Devices and Circuit Design Issues.
Proceedings of the International Symposium on Electronic System Design, 2012

2009
Subthreshold Deep Submicron Performance Investigation of CMOS and DTCMOS Biasing Schemes for Reconfigurable Computing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Carbon Nanotube Interconnects for Low-power High-speed Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009


  Loading...