Tughrul Arslan
Orcid: 0000-0001-8176-5803
According to our database1,
Tughrul Arslan
authored at least 353 papers
between 1999 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on eng.ed.ac.uk
On csauthors.net:
Bibliography
2024
Sensors, February, 2024
Dual-Planar Monopole Antenna-Based Remote Sensing System for Microwave Medical Applications.
Sensors, January, 2024
Novel statistical time series data augmentation and machine learning based classification of unobtrusive respiration data for respiration Digital Twin model.
Comput. Biol. Medicine, January, 2024
Non-Contact Wi-Fi Sensing of Respiration Rate for Older Adults in Care: A Validity and Repeatability Study.
IEEE Access, 2024
2023
Design and Evaluation of Wearable Multimodal RF Sensing System for Vascular Dementia Detection.
IEEE Trans. Biomed. Circuits Syst., October, 2023
Unlocking the Potential of Two-Point Cells for Energy-Efficient and Resilient Training of Deep Nets.
IEEE Trans. Emerg. Top. Comput. Intell., June, 2023
Multistatic radar-based imaging in layered and dispersive media for biomedical applications.
Biomed. Signal Process. Control., April, 2023
LAMANet: A Real-Time, Machine Learning-Enhanced Approximate Message Passing Detector for Massive MIMO.
IEEE Trans. Very Large Scale Integr. Syst., March, 2023
Algorithms, 2023
A Novel Digital Twin (DT) Model Based on WiFi CSI, Signal Processing and Machine Learning for Patient Respiration Monitoring and Decision-Support.
IEEE Access, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Live Demonstration: Cloud-based Audio-Visual Speech Enhancement in Multimodal Hearing-aids.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Live Demonstration: Unlocking the Potential of Two-Point Neuronal Cells for Energy-Efficient Training of Deep Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the 13th International Conference on Indoor Positioning and Indoor Navigation, 2023
Proceedings of the IEEE International Conference on Acoustics, 2023
Resource-Aware Online Permanent Fault Detection Mechanism for Streaming Convolution Engine in Edge AI Accelerators.
Proceedings of the IEEE International Conference On Artificial Intelligence Testing, 2023
2022
ACM Trans. Reconfigurable Technol. Syst., 2022
Magnetic Disturbance Detection for Smartphone-Based Indoor Positioning Systems With Unsupervised Learning.
IEEE Trans. Instrum. Meas., 2022
Evaluation of Unobtrusive Microwave Sensors in Healthcare 4.0 - Toward the Creation of Digital-Twin Model.
Sensors, 2022
Unlocking the potential of two-point cells for energy-efficient training of deep nets.
CoRR, 2022
Design of Flexible Meander Line Antenna for Healthcare for Wireless Medical Body Area Networks.
CoRR, 2022
Hearing Loss, Cognitive Load and Dementia: An Overview of Interrelation, Detection and Monitoring Challenges with Wearable Non-invasive Microwave Sensors.
CoRR, 2022
Biomed. Signal Process. Control., 2022
IEEE Access, 2022
Next Generation Cognition-Aware Hearing Aid Devices With Microwave Sensors: Opportunities and Challenges.
IEEE Access, 2022
Proceedings of the IEEE Wireless Communications and Networking Conference, 2022
Proceedings of the 95th IEEE Vehicular Technology Conference, 2022
A WiFi Fingerprint Augmentation Method for 3-D Crowdsourced Indoor Positioning Systems.
Proceedings of the 12th IEEE International Conference on Indoor Positioning and Indoor Navigation, 2022
Proceedings of the 12th IEEE International Conference on Indoor Positioning and Indoor Navigation, 2022
A Dynamically Reconfigurable Column Streaming-based Convolution Engine for Edge AI Accelerators.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022
Design of Flexible Meander Line Antenna for Healthcare in Wireless Body Area Network Systems.
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
Intelligent Sensing Technologies for the Diagnosis, Monitoring and Therapy of Alzheimer's Disease: A Systematic Review.
Sensors, 2021
Design, Implementation, and Measurement Procedure of Underwater and Water Surface Antenna for LoRa Communication.
Sensors, 2021
Parallel Delay Multiply and Sum Algorithm for Microwave Medical Imaging Using Spark Big Data Framework.
Algorithms, 2021
Hardware Accelerator for Wearable and Portable Radar-Based Microwave Breast Imaging Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
EnSuRe: Energy & Accuracy Aware Fault-tolerant Scheduling on Real-time Heterogeneous Systems.
Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021
A Column Streaming-Based Convolution Engine and Mapping Algorithm for CNN-based Edge AI Accelerators.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
Non-Invasive RF Technique for Detecting Different Stages of Alzheimer's Disease and Imaging Beta-Amyloid Plaques and Tau Tangles in the Brain.
IEEE Trans. Medical Imaging, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proxy Circuits for Fault-Tolerant Primitive Interfacing in Reconfigurable Devices Targeting Extreme Environments.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
Integrated Flexible Hybrid Silicone-Textile Dual-Resonant Sensors and Switching Circuit for Wearable Neurodegeneration Monitoring Systems.
IEEE Trans. Biomed. Circuits Syst., 2019
Dielectric Measurements of Brain Tissues with Alzheimer's Disease Pathology in the Microwave Region.
Proceedings of the IEEE International Symposium on Medical Measurements and Applications, 2019
A Dynamic Feature Fusion Strategy for Magnetic Field and Wi-Fi Based Indoor Positioning.
Proceedings of the 2019 International Conference on Indoor Positioning and Indoor Navigation, 2019
Evaluation of Partially Constant, Fine-Grained, Dynamic Partial Reconfigurable Functions in FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Proceedings of the 29th IEEE Annual International Symposium on Personal, 2018
Characterization of Clock Buffers for On-Chip Inter-Circuit Communication in Xilinx FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
Efficient Runtime Frame ECC Recomputation for Reliable Task Execution on Xilinx FPGAs.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
R3TOS-Based Integrated Modular Space Avionics for On-Board Real-Time Data Processing.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
Fault-Tolerant Mechanisms for Relocation-Aware Dynamic On-Chip Communication on FPGAs.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
2017
A placement management circuit for efficient realtime hardware reuse on FPGAs targeting reliable autonomous systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
FAReP: Fragmentation-Aware Replacement Policy for Task Reuse on Reconfigurable FPGAs.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017
Clock Buffers, Nets, and Trees for On-Chip Communication: A Novel Network Access Technique in FPGAs.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017
Proceedings of the 2017 International Conference on Indoor Positioning and Indoor Navigation, 2017
Magnetic field indoor positioning system based on automatic spatial-segmentation strategy.
Proceedings of the 2017 International Conference on Indoor Positioning and Indoor Navigation, 2017
Proceedings of the International Conference on Localization and GNSS, 2017
Monte Carlo localization algorithm for indoor positioning using Bluetooth low energy devices.
Proceedings of the International Conference on Localization and GNSS, 2017
Proceedings of the International Conference on Localization and GNSS, 2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017
Proceedings of the Seventh International Conference on Emerging Security Technologies, 2017
Towards an efficient intellectual property protection in dynamically reconfigurable FPGAs.
Proceedings of the Seventh International Conference on Emerging Security Technologies, 2017
A tiny and multifunctional ICAP controller for dynamic partial reconfiguration system.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017
An online task placement algorithm based on maximum empty rectangles in dynamic partial reconfigurable systems.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017
Design of reconfigurable and reliable application specific network on chip for R3TOS.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017
Expanding the un-usable area strategy for improved utilization of reconfigurable FPGAs.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017
2016
Dual scaling and sub-model based PnP algorithm for indoor positioning based on optical sensing using smartphones.
Proceedings of the International Conference on Indoor Positioning and Indoor Navigation, 2016
Proceedings of the International Conference on Indoor Positioning and Indoor Navigation, 2016
2015
Microkernel Architecture and Hardware Abstraction Layer of a Reliable Reconfigurable Real-Time Operating System (R3TOS).
ACM Trans. Reconfigurable Technol. Syst., 2015
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015
2014
A fast and scalable FPGA damage diagnostic service for R3TOS using BIST cloning technique.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014
2013
High-Efficiency Customized Coarse-Grained Dynamically Reconfigurable Architecture for JPEG2000.
IEEE Trans. Very Large Scale Integr. Syst., 2013
R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs.
IEEE Trans. Computers, 2013
Adaptive three-dimensional cellular genetic algorithm for balancing exploration and exploitation processes.
Soft Comput., 2013
J. Parallel Distributed Comput., 2013
Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence.
Int. J. Reconfigurable Comput., 2013
Efficient ultra-high-voltage controller-based complementary-metal-oxide-semiconductor switched-capacitor DC-DC converter for radio-frequency micro-electro-mechanical systems switch actuation.
IET Circuits Devices Syst., 2013
Proceedings of the 24th IEEE Annual International Symposium on Personal, 2013
Proceedings of the 24th IEEE Annual International Symposium on Personal, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012
2011
Multi-objective evolutionary optimizations of a space-based reconfigurable sensor network under hard constraints.
Soft Comput., 2011
IEEE Embed. Syst. Lett., 2011
Snake: An Efficient Strategy for the Reuse of Circuitry and Partial Computation Results in High-Performance Reconfigurable Computing.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Empty Resource Compaction Algorithms for Real-Time Hardware Tasks Placement on Partially Reconfigurable FPGAs Subject to Fault Ocurrence.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Proceedings of the 4th IFIP International Conference on New Technologies, 2011
Proceedings of the 2011 International Conference on Indoor Positioning and Indoor Navigation, 2011
Methods and Mechanisms for Hardware Multitasking: Executing and Synchronizing Fully Relocatable Hardware Tasks in Xilinx FPGAs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Practical design strategy for two-phase step up DC-DC Fibonacci Switched-Capacitor converter.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011
Enabling FPGAs for future deep space exploration missions: Improving fault-tolerance and computation density with R3TOS.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
Fault tolerant three-dimensional cellular genetic algorithms with adaptive migration schemes.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
Interframe Bus Encoding Technique and Architecture for MPEG-4 AVC/H.264 Video Compression.
IEEE Trans. Very Large Scale Integr. Syst., 2010
High level modeling and automated generation of heterogeneous SoC architectures with optimized custom reconfigurable cores and on-chip communication media.
J. Syst. Archit., 2010
A high-efficiency reconfigurable 2-D Discrete Wavelet Transform engine for JPEG2000 implementation on next generation digital cameras.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010
Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010
Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010
A parallel hybrid merge-select sorting scheme for K-best LSD MIMO decoder on a dynamically reconfigurable processor.
Proceedings of the IEEE 21st International Symposium on Personal, 2010
ASIC Design of an Adaptive Control Unit for Reconfigurable Analog-to-Digital Converters.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
Proceedings of the International Conference on Field-Programmable Technology, 2010
Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs.
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Dual-core reconfigurable demosaicing engine for next generation of portable camera systems.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
A hybrid dual-core Reconfigurable Processor for EBCOT tier-1 encoder in JPEG2000 on next generation of digital cameras.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Lattice reconfiguration vs. local selection criteria for diversity tuning in cellular GAs.
Proceedings of the IEEE Congress on Evolutionary Computation, 2010
Fault tolerance through automatic cell isolation using three-dimensional cellular genetic algorithms.
Proceedings of the IEEE Congress on Evolutionary Computation, 2010
Adaptive radiation pattern optimization for antenna arrays by phase perturbations using particle swarm optimization.
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
Balancing exploration and exploitation in an adaptive three-dimensional cellular genetic algorithm via a probabilistic selection operator.
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
2009
IEEE Trans. Circuits Syst. Video Technol., 2009
Multicore Architectures With Dynamically Reconfigurable Array Processors for Wireless Broadband Technologies.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
A novel high-efficiency partial-parallel context modeling architecture for EBCOT in JPEG2000.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Heterogeneous multi-core architectures with dynamically reconfigurable processors for WiMAX transmitter.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Heterogeneous multi-core architectures with dynamically reconfigurable processors for wireless communication.
Proceedings of the IEEE 7th Symposium on Application Specific Processors, 2009
Proceedings of the Knowledge-Based and Intelligent Information and Engineering Systems, 2009
Subthreshold Deep Submicron Performance Investigation of CMOS and DTCMOS Biasing Schemes for Reconfigurable Computing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
A SDR platform for mobile Wi-Fi/3G UMTS system on a dynamic reconfigurable architecture.
Proceedings of the 17th European Signal Processing Conference, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
A distributed cellular GA based architecture for real time GPS attitude determination.
Proceedings of the IEEE Congress on Evolutionary Computation, 2009
Proceedings of the 2009 Symposium on Bio-inspired Learning and Intelligent Systems for Security, 2009
Effect of a Central Antenna Element on the Directivity, Half-Power Beamwidth and Side-Lobe Level of Circular Antenna Arrays.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
Implementation of Highly Pipelined Datapaths on a Reconfigurable Asynchronous Substrate.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
Efficient Implementation of WiMAX Physical Layer on Multi-core Architectures with Dynamically Reconfigurable Processors.
Scalable Comput. Pract. Exp., 2008
Adaptive hardware/evolvable hardware - The state of the art and the prospectus for future development.
Int. J. Knowl. Based Intell. Eng. Syst., 2008
A power-aware algorithm for the design of reconfigurable hardware during high level placement.
Int. J. Knowl. Based Intell. Eng. Syst., 2008
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
OFDM symbol timing synchronization system on a Reconfigurable Instruction Cell Array.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
Exploiting loop-level parallelism on multi-core architectures for the wimax physical layer.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
MRPSIM: A TLM based simulation tool for MPSOCS targeting dynamically reconfigurable processors.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
Evaluation of contrast limited adaptive histogram equalization (CLAHE) enhancement on a FPGA.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
Multi-core Architectures with Dynamically Reconfigurable Array Processors for the WiMAX Physical Layer.
Proceedings of the IEEE Symposium on Application Specific Processors, 2008
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
Communication Centric Modelling of System on Chip Devices Targeting Multi-standard Telecommunication Applications.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
A state based framework for efficient system-level power estimation of of costum reconfigurable cores.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Scalability of a Novel Shifting Balance Theory-Based Optimization Algorithm: A Comparative Study on a Cluster-Based Wireless Sensor Network.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2008
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008
Dynamically programmable Reed Solomon processor with embedded Galois Field multiplier.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008
SystemC-based Custom Reconfigurable Cores for Wireless Applications.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008
Implementation of Hardware Encryption Engine for Wireless Communication on a Reconfigurable Instruction Cell Architecture.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
Automated Dynamic Throughput-constrained Structural-level Pipelining in Streaming Applications.
Proceedings of the Design, Automation and Test in Europe, 2008
Efficient Implementation of Wireless Applications on Multi-core Platforms Based on Dynamically Reconfigurable Processors.
Proceedings of the Second International Conference on Complex, 2008
A novel shifting balance theory-based approach to optimization of an energy-constrained modulation scheme for wireless sensor networks.
Proceedings of the IEEE Congress on Evolutionary Computation, 2008
Evolutionary techniques for precise and real-time implementation of low-power FIR filters.
Proceedings of the IEEE Congress on Evolutionary Computation, 2008
Proceedings of the IEEE Congress on Evolutionary Computation, 2008
Proceedings of the 2008 ECSIS Symposium on Bio-inspired, 2008
Proceedings of the 2008 ECSIS Symposium on Bio-inspired, 2008
Adaptive Formation Control and Bio-inspired Optimization of a Cluster-based Satellite Wireless Sensor Network.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
Distributed Adaptability and Mobility in Space Based Wireless Pico-Satellite Sensor Networks.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
Addressing Future Space Challenges using Reconfigurable Instruction Cell Based Architectures.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
Dynamically Reconfigurable NoC with Bus Based Interface for Ease of Integration and Reduced Design Time.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
2007
Low Power Implementation for Minimum Norm Sorting and Block Upper Tri-angularization of Matrices used in MIMO Wireless Systems.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
A Power and Area Efficient Maximum Likelihood Detector Implementation for High Throughput MIMO Systems.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 2007 IEEE International SOC Conference, 2007
Power evaluation of the arbitration policy for different on-chip bus based SoC platform.
Proceedings of the 2007 IEEE International SOC Conference, 2007
A fast pull-in scheme of plls using a triple path nonlinear phase frequency detector.
Proceedings of the 2007 IEEE International SOC Conference, 2007
Performance analysis of IEEE defined LDPC codes under various decoding algorithms and their implementation on a reconfigurable instruction cell architecture.
Proceedings of the 2007 IEEE International SOC Conference, 2007
Proceedings of the 2007 IEEE International SOC Conference, 2007
Low Computation and Memory Access for Variable Block Size Motion Estimation Using Pixel Truncation.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
Proceedings of the International Symposium on System-on-Chip, 2007
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Code Compression and Decompression for Instruction Cell Based Reconfigurable Systems.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
System-Level Modeling and Multi-objective Evolutionary Design of Pipelined FFT Processors for Wireless OFDM Receivers.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2007
Algorithmic Level Design Space Exploration Tool for Creation of Highly Optimized Synthesizable Circuits.
Proceedings of the IEEE International Conference on Acoustics, 2007
A Multi Objective GA based Physical Placement Algorithm for Heterogeneous Dynamically Reconfigurable Arrays.
Proceedings of the FPL 2007, 2007
H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture.
Proceedings of the FPL 2007, 2007
The Design of Multitasking Based Applications on Reconfigurable Instruction Cell Bsed Architectures.
Proceedings of the FPL 2007, 2007
System-level Modelling and Analysis of Embedded Reconfigurable Cores for Wireless Systems.
Proceedings of the FPL 2007, 2007
Mapping Real Time Operating System on Reconfigurable Instruction Cell Based Architectures.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007
Code Compressor and Decompressor for Ultra Large Instruction Width Coarse-Grain Reconfigurable Systems.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007
Analysis and Optimization of a Wireless Communication System for an Ingestable Sensor Microsystem.
Proceedings of the Frontiers in the Convergence of Bioscience and Information Technologies 2007, 2007
A new pipelined implementation for minimum norm sorting used in square root algorithm for MIMO-VBLAST systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Pipelined implementation of a real time programmable encoder for low density parity check code on a reconfigurable instruction cell architecture.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
A multi-objective algorithm for the design of high performance reconfigurable architectures with embedded decoding.
Proceedings of the IEEE Congress on Evolutionary Computation, 2007
An Improved Particle Swarm Optimization Algorithm for Power-Efficient Wireless Sensor Networks.
Proceedings of the 2007 ECSIS Symposium on Bio-inspired, 2007
Proceedings of the 2007 ECSIS Symposium on Bio-inspired, 2007
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Architecture.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Multiobjective Optimal Design of MEMS-Based Reconfigurable and Evolvable Sensor Networks for Space Applications.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
A Multi-object GA Based Physical Placement Algorithm for Heterogeneous Dynamicaly Reconfigurable Arrays.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
High Performance Embedded Reconfigurable Concatenated Convolution- Puncturing Fabric for 802.16.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
2006
Analysis and Implementation of Multiple-Input, Multiple-Output VBLAST Receiver From Area and Power Efficiency Perspective.
IEEE Trans. Very Large Scale Integr. Syst., 2006
An Efficient Pre-Traceback Architecture for the Viterbi Decoder Targeting Wireless Communication Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
A Novel Architecture Using the Decorrelating Transform for Low Power Adaptive Filters.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Custom Reconfigurable Architecture for Autonomous Fault-Recovery of MEMS Vibratory Sensor Electronics.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Area and Power Efficient VLSI Architecture for Computing Pseudo Inverse of Channel Matrix in a MIMO Wireless System.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
H.264 Decoder Implementation on a Dynamically Reconfigurable Instruction Cell Based Architecture.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
A Real Time Programmable Encoder for Low Density Parity Check Code as specified in the IEEE P802.16E/D7 Standard and its Efficient Implementation on a DSP Processor.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Autonomous Realization of Boeing/JPL Sensor Electronics based on Reconfigurable System-on-Chip Technology.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Enhanced Dual Strategy based VLSI Architecture for Computing Pseudo Inverse of Channel Matrix in a MIMO Wireless System.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
A Low Power Pipelined Maximum Likelihood Detector for 4x4 QPSK MIMO Wireless Communication Systems.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Low-power implementation of FIR filters within an adaptive reconfigurable architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A stochastic multi-objective algorithm for the design of high performance reconfigurable architectures.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006
A real time programmable encoder for low density parity check code targeting a reconfigurable instruction cell architecture.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006
Integrating the Electronics of the Control-Loops of the JPL/Boeing Gyroscope Within an Evolvable Hardware Architecture.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
An Efficient Fault Tolerance Scheme for Preventing Single Event Disruptions in Reconfigurable Architectures.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Non-Uniform search domain based Genetic algorithm for the optimization of real time FFT Processor architectures.
Proceedings of the IEEE International Conference on Evolutionary Computation, 2006
An Incremental Evolutionary Strategy for the Design of FIR Filters Targeting Real-Time Applications.
Proceedings of the IEEE International Conference on Evolutionary Computation, 2006
Proceedings of the IEEE International Conference on Evolutionary Computation, 2006
Towards the Integration of Drive Control Loop Electronics of the JPL/Boeing Gyroscope within an Autonomous Robust Custom-Reconfigurable Platform.
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
Wormhole Routing with Virtual Channels using Adaptive Rate Control for Network-on-Chip (NoC).
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
An Efficient Technique for Preventing Single Event Disruptions in Synchronous and Reconfigurable Architectures.
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
Embedded Reconfigurable Array Fabrics for Efficient Implementation of Image Compression Techniques.
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
ESPACENET: A Framework of Evolvable and Reconfigurable Sensor Networks for Aerospace-Based Monitoring and Diagnostics.
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
2005
A direct-sequence spread-spectrum communication system for integrated sensor microsystems.
IEEE Trans. Inf. Technol. Biomed., 2005
Genet. Program. Evolvable Mach., 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Architecture and design methodology for synthesizable reconfigurable array targeting wireless system-on-chip applications.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
A Low Power Heterogenous Reconfigurable Architecture For Embedded Generic Finite State Machines.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
A Power Efficient Reconfigurable Max-Log-MAP Turbo Decoder for Wireless Communication Systems.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
High Speed Max-Log-MAP Turbo SISO Decoder Implementation Using Branch Metric Normalization.
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
Providing Compilers and Application Program Support for Reconfigurable SoCs: Radical but Overdue.
Proceedings of the 2005 International Symposium on System-on-Chip, 2005
A Formal Approach to Virtualisation and Provisioning in AMBA AHB-based Reconfigurable Systems-on-Chip.
Proceedings of the 2005 International Symposium on System-on-Chip, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Efficient implementation of trace-back unit in a reconfigurable Viterbi decoder fabric.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A Low-Power and Domain-Specific Reconfigurable FFT Fabric for System-on-Chip Applications.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
Domain-Specific Reconfigurable Array Targeting Discrete Wavelet Transform for System-on-Chip Applications.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
Domain Specific Reconfigurable Architecture of Turbo Decoder Optimized for Short Distance Wireless Communication.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
Multiplier-less based parallel-pipelined FFT architectures for wireless communication applications.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005
Implementation of an efficient two-step SOVA turbo decoder for wireless communication systems.
Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005
Low Power Domain-Specific Reconfigurable Array for Discrete Wavelet Transforms Targeting Multimedia Applications.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
A Multi-objective Genetic Algorithm for On-chip Real-time Optimisation of Word Length and Power Consumption in a Pipelined FFT Processor targeting a MC-CDMA Receiver.
Proceedings of the 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June, 2005
An EHW Architecture for the Design of Unconstrained Low-Power FIR Filters for Sensor Control Using Custom-Reconfigurable Technology.
Proceedings of the 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June, 2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
Proceedings of the IEEE Congress on Evolutionary Computation, 2005
Elitist selection schemes for genetic algorithm based printed circuit board inspection system.
Proceedings of the IEEE Congress on Evolutionary Computation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
The development of high performance FFT IP cores through hybrid low power algorithmic methodology.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Evolutionary design and adaptation of high performance digital filters within an embedded reconfigurable fault tolerant hardware platform.
Soft Comput., 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
An efficient reformulation based architecture for adaptive forward error correction decoding in wireless applications.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Video transmission through domain specific reconfigurable architecurtes over short distance wireless medium utilizing Bluetooth IEEE 802.15.1™ standard [architecurtes read architectures].
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the Integrated Circuit and System Design, 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Synthesizable Reconfigurable Array Targeting Distributed Arithmetic for System-on-Chip Applications.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004
Self-recovery experiments in extreme environments using a field programmable transistor array.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004
Switch-box design for synthesizable coarse-grain arrays for system-on-chip applications.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004
A Genetic Algorithm for the Optimisation of a Reconfigurable Pipelined FFT Processor.
Proceedings of the 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 2004
Proceedings of the 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 2004
An Efficient Fault-Tolerant VLSI Architecture Using Parallel Evolvable Hardware Technology.
Proceedings of the 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 2004
Efficient Implementations of Mobile Video Computations on Domain-Specific Reconfigurable Arrays.
Proceedings of the 2004 Design, 2004
Proceedings of the IEEE Congress on Evolutionary Computation, 2004
2003
A novel coefficient ordering based low power pipelined radix-4 FFT processor for wireless LAN applications.
IEEE Trans. Consumer Electron., 2003
Crosstalk Immune Coding from Area and Power Perspective for high performance AMBA based SoC systems.
Proceedings of the IFIP VLSI-SoC 2003, 2003
A low power datapath for algebraic codebook search targeting a generic GSM system-on-chip platform.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
A delay spread based low power reconfigurable FFT processor architecture for wireless receiver.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
Shift-accumulator ALU centric JPEG2000 5/3 lifting based discrete wavelet transform architecture.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
A triple port RAM based low power commutator architecture for a pipelined FFT processor.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Proceedings of the 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 2003
Proceedings of the 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 2003
Power/Area Analysis and Optimization of a DS-SS receiver for an Integrated Sensor Microsystem.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003
Proceedings of the IEEE Congress on Evolutionary Computation, 2003
On the impact of modelling, robustness and diversity to the performance of a multi-objective evolutionary algorithm for digital VLSI system design.
Proceedings of the IEEE Congress on Evolutionary Computation, 2003
2002
A Combined Coefficient Segmentation and Block Processing Algorithm for Low Power Implementation of FIR Digital Filters.
VLSI Design, 2002
Eur. Trans. Telecommun., 2002
Des. Autom. Embed. Syst., 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
An embedded extension algorithm for the lifting based Discrete Wavelet Transform in JPEG2000.
Proceedings of the IEEE International Conference on Acoustics, 2002
Proceedings of the IEEE International Conference on Acoustics, 2002
Proceedings of the 11th European Signal Processing Conference, 2002
An EHW Architecture for Real-Time GPS Attitude Determination Based on Parallel Genetic Algorithm.
Proceedings of the 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 2002
Proceedings of the 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 2002
The Implementation of an Evolvable Hardware System for Real Time Image Registration on a System-on-Chip Platform.
Proceedings of the 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 2002
Proceedings of the 2002 Congress on Evolutionary Computation, 2002
An evolutionary algorithm for the multi-objective optimisation of VLSI primitive operator filters.
Proceedings of the 2002 Congress on Evolutionary Computation, 2002
2001
IEEE Trans. Evol. Comput., 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Evolutionary Design And Adaptation Of Digital Filters Within An Embedded Fault Tolerant Hardware Platform .
Proceedings of the 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 2001
Proceedings of the 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 2001
2000
VLSI Design, 2000
A hybrid segmentation and block processing algorithm for low power implementation of digital filters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
An order based segmentation algorithm for low power implementation of digital filters.
Proceedings of the IEEE International Conference on Acoustics, 2000
A Novel Evolvable Hardware Framework for the Evolution of High Performance Digital Circuits.
Proceedings of the Genetic and Evolutionary Computation Conference (GECCO '00), 2000
A novel genetic algorithm for the automated design of performance driven digital circuits.
Proceedings of the 2000 Congress on Evolutionary Computation, 2000
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999