Jean-Luc Gaudiot
Orcid: 0000-0001-9164-8731
According to our database1,
Jean-Luc Gaudiot
authored at least 267 papers
between 1982 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1999, "For contributions to the programmability and reliability of dataflow architectures.".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on zbmath.org
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on orcid.org
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on dl.acm.org
On csauthors.net:
Bibliography
2024
Proceedings of the 27th IEEE International Symposium on Real-Time Distributed Computing, 2024
2023
A Novel Spatial-Temporal Multi-Scale Alignment Graph Neural Network Security Model for Vehicles Prediction.
IEEE Trans. Intell. Transp. Syst., January, 2023
Proceedings of the First Tiny Papers Track at ICLR 2023, 2023
2022
IEEE Trans. Computers, 2022
A Profile-Based AI-Assisted Dynamic Scheduling Approach for Heterogeneous Architectures.
Int. J. Parallel Program., 2022
Autonomous Vehicles Digital Twin: A Practical Paradigm for Autonomous Driving System Development.
Computer, 2022
TransMigrator: A Transformer-Based Predictive Page Migration Mechanism for Heterogeneous Memory.
Proceedings of the Network and Parallel Computing, 2022
Proceedings of the International Conference on Embedded Software, 2022
Proceedings of the 46th IEEE Annual Computers, Software, and Applications Conferenc, 2022
2021
The Promise of Dataflow Architectures in the Design of Processing Systems for Autonomous Machines.
CoRR, 2021
Connect. Sci., 2021
Π-RT: A Runtime Framework to Enable Energy-Efficient Real-Time Robotic Vision Applications on Heterogeneous Architectures.
Computer, 2021
Proceedings of the IEEE 45th Annual Computers, Software, and Applications Conference, 2021
2020
Synthesis Lectures on Computer Science, Morgan & Claypool Publishers, ISBN: 978-3-031-01805-3, 2020
IEEE Trans. Ind. Informatics, 2020
π-Hub: Large-scale video learning, storage, and retrieval on heterogeneous hardware platforms.
Future Gener. Comput. Syst., 2020
Computer, 2020
IEEE Access, 2020
PDAWL: Profile-Based Iterative Dynamic Adaptive WorkLoad Balance on Heterogeneous Architectures.
Proceedings of the Job Scheduling Strategies for Parallel Processing, 2020
2019
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019
Detecting Malicious Attacks Exploiting Hardware Vulnerabilities Using Performance Counters.
Proceedings of the 43rd IEEE Annual Computer Software and Applications Conference, 2019
2018
Energy efficiency of heterogeneous multicore system based on the enhanced Amdahl's law.
Int. J. High Perform. Comput. Netw., 2018
Online Detection of Spectre Attacks Using Microarchitectural Traces from Performance Counters.
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018
Proceedings of the 2018 IEEE 42nd Annual Computer Software and Applications Conference, 2018
2017
Synthesis Lectures on Computer Science, Morgan & Claypool Publishers, ISBN: 978-3-031-01802-2, 2017
An effective pre-store/pre-load method exploiting intra-request idle time of NAND flash-based storage devices.
Microprocess. Microsystems, 2017
CoRR, 2017
Proceedings of the 2017 IEEE 7th International Symposium on Cloud and Service Computing, 2017
PETRAS: Performance, Energy and Thermal Aware Resource Allocation and Scheduling for Heterogeneous Systems.
Proceedings of the 8th International Workshop on Programming Models and Applications for Multicores and Manycores, 2017
A Runtime Workload Distribution with Resource Allocation for CPU-GPU Heterogeneous Systems.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017
Return of experience on the mean-shift clustering for heterogeneous architecture use case.
Proceedings of the 2017 IEEE International Conference on Big Data (IEEE BigData 2017), 2017
2016
Reevaluating the overhead of data preparation for asymmetric multicore system on graphics processing.
KSII Trans. Internet Inf. Syst., 2016
Extending Amdahl's Law for Heterogeneous Multicore Processor with Consideration of the Overhead of Data Preparation.
IEEE Embed. Syst. Lett., 2016
Proceedings of the 2016 IEEE Trustcom/BigDataSE/ISPA, 2016
Proceedings of the Languages and Compilers for Parallel Computing, 2016
PETS: Performance, energy and thermal aware scheduler for job mapping with resource allocation in heterogeneous systems.
Proceedings of the 35th IEEE International Performance Computing and Communications Conference, 2016
2015
Network Variation and Fault Tolerant Performance Acceleration in Mobile Devices with Simultaneous Remote Execution.
IEEE Trans. Computers, 2015
Design of configurable I/O pin control block for improving reusability in multimedia SoC platforms.
Multim. Tools Appl., 2015
IEEE Comput. Archit. Lett., 2015
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015
2014
IEEE Trans. Computers, 2014
Complexity-Effective Contention Management with Dynamic Backoff for Transactional Memory Systems.
IEEE Trans. Computers, 2014
How many cores do we need to run a parallel workload: A test drive of the Intel SCC platform?
J. Parallel Distributed Comput., 2014
Int. J. Parallel Program., 2014
An Energy and Performance Efficient DVFS Scheme for Irregular Parallel Divide-and-Conquer Algorithms on the Intel SCC.
IEEE Comput. Archit. Lett., 2014
Proceedings of the Advanced Computer Architecture - 10th Annual Conference, 2014
2013
IEEE Trans. Parallel Distributed Syst., 2013
Achieving energy efficiency through runtime partial reconfiguration on reconfigurable systems.
ACM Trans. Embed. Comput. Syst., 2013
ACM Trans. Embed. Comput. Syst., 2013
IEEE Trans. Computers, 2013
Microprocess. Microsystems, 2013
J. Comput. Sci. Technol., 2013
Enhancement for Potential Target in Cryptography Algorithms by Applying Processor-in-Memory Architecture.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Mark-Sharing: A Parallel Garbage Collection Algorithm for Low Synchronization Overhead.
Proceedings of the 19th IEEE International Conference on Parallel and Distributed Systems, 2013
Proceedings of the Grid and Pervasive Computing - 8th International Conference, 2013
Scheduling optimization in multicore multithreaded microprocessors through dynamic modeling.
Proceedings of the Computing Frontiers Conference, 2013
2012
Achieving middleware execution efficiency: hardware-assisted garbage collection operations.
J. Supercomput., 2012
J. Supercomput., 2012
IEEE Trans. Computers, 2012
IEEE Trans. Computers, 2012
J. Interconnect. Networks, 2012
Proceedings of the International Conference on IT Convergence and Security, 2012
Proceedings of the 16th Workshop on Interaction between Compilers and Computer Architectures, 2012
2011
Reducing Power in All Major CAM and SRAM-Based Processor Units via Centralized, Dynamic Resource Size Management.
IEEE Trans. Very Large Scale Integr. Syst., 2011
Workload characterization of cryptography algorithms for hardware acceleration (abstracts only).
SIGMETRICS Perform. Evaluation Rev., 2011
Int. J. Parallel Program., 2011
IEEE Comput. Archit. Lett., 2011
Proceedings of the ICPE'11, 2011
Proceedings of the Network and Parallel Computing - 8th IFIP International Conference, 2011
Keynote talk: Fighting Amdahl's law in many-core and GPU parallel architectures with value prediction.
Proceedings of the 9th IEEE/ACS International Conference on Computer Systems and Applications, 2011
2010
IEEE Trans. Computers, 2010
Int. J. Parallel Program., 2010
The Performance Analysis and Hardware Acceleration of Crypto-computations for Enhanced Security.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2010
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2010
Hardware-assisted security mechanism: The acceleration of cryptographic operations with low hardware cost.
Proceedings of the 29th International Performance Computing and Communications Conference, 2010
Proceedings of the 39th International Conference on Parallel Processing, 2010
Proceedings of the 39th International Conference on Parallel Processing, 2010
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
On energy efficiency of reconfigurable systems with run-time partial reconfiguration.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
2009
Special issue of Supercomputing Journal on secure, manageable and controllable grid services.
J. Supercomput., 2009
IEEE Trans. Computers, 2009
A complexity-effective microprocessor design with decoupled dispatch queues and prefetching.
Parallel Comput., 2009
IEEE Comput. Archit. Lett., 2009
Packer: An innovative space-time-efficient parallel garbage collection algorithm based on virtual spaces.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Proceedings of the Algorithms and Architectures for Parallel Processing, 2009
Proceedings of the 33rd Annual IEEE International Computer Software and Applications Conference, 2009
Proceedings of the 6th Conference on Computing Frontiers, 2009
2008
An Efficient Data-Distribution Mechanism in a Processor-In-Memory (PIM) Architecture Applied to Motion Estimation.
IEEE Trans. Computers, 2008
J. Syst. Archit., 2008
Image Vis. Comput., 2008
Design and Implementation of an Agent Home Scheme Strategy for Prefetch-Based DSM Systems.
Int. J. Parallel Program., 2008
Int. J. Parallel Program., 2008
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008
Proceedings of the 26th International Conference on Computer Design, 2008
The potential of fine-grained value prediction in enhancing the performance of modern parallel machines.
Proceedings of the 13th Asia-Pacific Computer Systems Architecture Conference, 2008
Proceedings of the 13th Asia-Pacific Computer Systems Architecture Conference, 2008
2007
Architectural Implications of Cache Coherence Protocols with Network Applications on Chip MultiProcessors.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2007
Architectural Support for Network Applications on Simultaneous MultiThreading Processors.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Proceedings of the Advances in Computer Systems Architecture, 2007
2006
J. Supercomput., 2006
Throttling-Based Resource Management in High Performance Multithreaded Architectures.
IEEE Trans. Computers, 2006
Adaptive dynamic thread scheduling for simultaneous multithreaded architectures with a detector thread.
J. Parallel Distributed Comput., 2006
J. Parallel Distributed Comput., 2006
Design Trade-Offs and Deadlock Prevention in Transient Fault-Tolerant SMT Processors.
Proceedings of the 12th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2006), 2006
Proceedings of the 2006 IEEE John Vincent Atanasoff International Symposium on Modern Computing (JVA2006), 2006
Proceedings of the Parallel and Distributed Processing and Applications, 2006
Proceedings of the Computational Science and Its Applications, 2006
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006
2005
Int. J. Parallel Program., 2005
Foreword (Special Issue on Applications for High-Performance Systems).
Int. J. Comput. Appl. Technol., 2005
Techniques to Improve Performance Beyond Pipelining: Superpipelining, Superscalar, and VLIW.
Adv. Comput., 2005
Proceedings of the Computational Science, 2005
Proceedings of the High Performance Computing, 2005
Static Partitioning vs Dynamic Sharing of Resources in Simultaneous MultiThreading Microarchitectures.
Proceedings of the Advanced Parallel Processing Technologies, 6th International Workshop, 2005
2004
Parallel Process. Lett., 2004
Alias Analysis in Java with Reference-Set Representation for High-Performance Computing.
Int. J. Parallel Program., 2004
On Design of Cluster and Grid Computing Environment Toolkit for Bioinformatics Applications.
Proceedings of the Distributed Computing, 2004
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Exploiting Single-Assignment Properties to Optimize Message-Passing Programs by Code Transformations.
Proceedings of the Implementation and Application of Functional Languages, 2004
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
Accelerating the Kernels of BLAST with an Efficient PIM (Processor-In-Memory) Architecture.
Proceedings of the 3rd International IEEE Computer Society Computational Systems Bioinformatics Conference, 2004
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004
2003
IEEE Trans. Computers, 2003
Int. J. Parallel Program., 2003
Incomplete Information Processing for Optimization of Distributed Applications.
Proceedings of the ACIS Fourth International Conference on Software Engineering, 2003
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface,10th European PVM/MPI Users' Group Meeting, Venice, Italy, September 29, 2003
Modeling and Predicting Point-to-Point Communications of MPI Parallel Programs in NOW Environments.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003
Proceedings of the Euro-Par 2003. Parallel Processing, 2003
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003
Proceedings of the 7th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-7 2003), 2003
2002
Future Gener. Comput. Syst., 2002
Performance Prediction Methodology for Parallel Programs with MPI in NOW Environments.
Proceedings of the Distributed Computing, 2002
Proceedings of the 16th Annual International Symposium on High Performance Computing Systems and Applications, 2002
Proceedings of the Euro-Par 2002, 2002
Proceedings of the Computer Science 2002, 2002
2001
Editorial Note.
Parallel Process. Lett., 2001
Parallel Process. Lett., 2001
Enhancing Functional and Irregular Parallelism: Stateful Functions and their Semantics.
Int. J. Parallel Program., 2001
Exploiting Locality in Single Assignment Data Structures Updated Through Split-Phase Transactions.
Clust. Comput., 2001
Proceedings of the Eigth International Conference on Parallel and Distributed Systems, 2001
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
Proceedings of the Compiler Optimizations for Scalable Parallel Systems Languages, 2001
Proceedings of the 24th Australasian Computer Science Conference (ACSC 2001), 29 January, 2001
Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 2001
2000
Flat Indexing Scheme: A New Compilation Technique to Enhance Parallelism of Logic Programs.
J. Inf. Sci. Eng., 2000
Caching Single-Assignment Structures to Build a Robust Fine-Grain Multi-Threading System.
Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000
Parallel Sorting Algorithms with Sampling Techniques on Clusters with Processors Running at Different Speeds.
Proceedings of the High Performance Computing, 2000
An Over-partitioning Scheme for Parallel Sorting on Clusters with Processors Running at different Speeds.
Proceedings of the 2000 IEEE International Conference on Cluster Computing (CLUSTER 2000), November 28th, 2000
1999
Communication Generation for Aligned and Cyclic(K) Distributions Using Integer Lattice.
IEEE Trans. Parallel Distributed Syst., 1999
Algorithms for Stable Sorting to Minimize Communications in Networks of Workstations and Their Implementations in BSP.
Proceedings of the International Workshop on Cluster Computing (IWCC '99), 1999
1998
Parallel Process. Lett., 1998
Proceedings of the International Conference on Parallel and Distributed Systems, 1998
1997
J. Parallel Distributed Comput., 1997
Exploiting locality and tolerating remote memory access latency using thread migration.
Int. J. Parallel Program., 1997
Proceedings of the 1997 International Symposium on Parallel Architectures, 1997
Proceedings of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97), 1997
1996
Parallel Computing with the Sisal Applicative Language: Programmability and Performance Issues.
Softw. Pract. Exp., 1996
Proceedings of the Eighth IEEE Symposium on Parallel and Distributed Processing, 1996
An Application of Extended Sisal 2.0.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996
Effects of Multithreading on Data and Workload Distribution for Distributed-Memory Multiprocessors.
Proceedings of IPPS '96, 1996
Proceedings of the 1996 International Conference on Parallel Processing, 1996
Proceedings of the Euro-Par '96 Parallel Processing, 1996
Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, 1996
Nomadic Threads: a migrating multithreaded approach to remote memory accesses in multiprocessors.
Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, 1996
1995
IEEE Trans. Neural Networks, 1995
Parallel Comput., 1995
Advanced topics in dataflow computing and multithreading.
IEEE, ISBN: 978-0-8186-6542-4, 1995
1994
Authors' Reply.
IEEE Trans. Computers, 1994
Proceedings of the 26th conference on Winter simulation, 1994
A Hierarchical Activation Management Technique for Fine-Grain Multithreaded Execution.
Proceedings of the PARLE '94: Parallel Architectures and Languages Europe, 1994
Proceedings of the 8th International Symposium on Parallel Processing, 1994
Exploitation of Fine-grain Parallelism in Logic Languages on Massively Parallel Architectures.
Proceedings of the Parallel Architectures and Compilation Techniques, 1994
1993
Block Scheduling of Iterative Algorithms and Graph-Level Priority Scheduling in a Simulated Data-Flow Multiprocessor.
IEEE Trans. Parallel Distributed Syst., 1993
Special Issue on DataFlow and Multithreaded Architectures - Guest Editors' Introduction.
J. Parallel Distributed Comput., 1993
Data-Driven Execution of Logic Languages.
Proceedings of the ICLP'93 Post Conference Workshop on: Concurrent, 1993
1992
Int. J. Artif. Intell. Tools, 1992
Proceedings of the SEKE'92, 1992
Proceedings of the 11th IAPR International Conference on Pattern Recognition, 1992
Performance Evaluation of the Multiple Root Node Approach to the Rete Pattern Matcher for Production Systems.
Proceedings of the International Conference on Fifth Generation Computer Systems. FGCS 1992, 1992
1991
Proceedings of the PARLE '91: Parallel Architectures and Languages Europe, 1991
Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991
A Macro Actor/Token Implementation of Production Systems on a Data-Mow Multiprocessor.
Proceedings of the 12th International Joint Conference on Artificial Intelligence. Sydney, 1991
Proceedings of the 5th international conference on Supercomputing, 1991
1990
IEEE Trans. Computers, 1990
Parallel Comput., 1990
J. Parallel Distributed Comput., 1990
Int. J. Pattern Recognit. Artif. Intell., 1990
Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, 1990
Proceedings of the 4th ACM SIGOPS European Workshop, Bologna, Italy, September 3-5, 1990, 1990
Proceedings of the 2nd International IEEE Conference on Tools for Artificial Intelligence, 1990
Compiling Programs to Direct Access Data-Flow Graphs.
Proceedings of the 1990 International Conference on Parallel Processing, 1990
A Decoupled Graph/Computation Data-Driven Architecture with Variable-Resolution Actors.
Proceedings of the 1990 International Conference on Parallel Processing, 1990
Proceedings of the CONPAR 90, 1990
Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990
1989
IEEE Trans. Computers, 1989
J. Parallel Distributed Comput., 1989
Proceedings of the Eigthth Symposium on Reliable Distributed Systems, 1989
Proceedings of the PARLE '89: Parallel Architectures and Languages Europe, 1989
Proceedings of the IEEE International Workshop on Tools for Artificial Intelligence: Architectures, 1989
Proceedings of the Fifth International Conference on Data Engineering, 1989
1988
IEEE Trans. Computers, 1988
Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988
Data-Driven Multiprocessor Implementation of the Rete Match Algorithm.
Proceedings of the International Conference on Parallel Processing, 1988
Iterative Algorithms in a Data-Driven Environment.
Proceedings of the International Conference on Parallel Processing, 1988
Proceedings of the 8th International Conference on Distributed Computing Systems, 1988
Lazy Evaluation of FP Programs: A Data-Flow Approach.
Proceedings of the International Conference on Fifth Generation Computer Systems, 1988
1987
Proceedings of the PARLE, 1987
Reliability and Performance Modelling of Hypercube-Based Mutliprocessors.
Proceedings of the Computer Performance and Reliability, 1987
Multi-Level Execution In Data-Flow Architectures.
Proceedings of the International Conference on Parallel Processing, 1987
1986
SIGART Newsl., 1986
: Token Relabeling in a Tagged Data-Flow Architecture.
Proceedings of the International Conference on Parallel Processing, 1986
1985
IEEE Trans. Computers, 1985
J. Parallel Distributed Comput., 1985
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985
Fault-Tolerance and Data-Flow Systems.
Proceedings of the 5th International Conference on Distributed Computing Systems, 1985
1984
Performance Analysis of a Data-Flow Computer with Variable Resolution Actors.
Proceedings of the 4th International Conference on Distributed Computing Systems, 1984
1982
A scheme for handling arrays in data-flow systems.
Proceedings of the Proceedings of the 3rd International Conference on Distributed Computing Systems, 1982