Yong Ho Song

Orcid: 0000-0002-1759-4242

According to our database1, Yong Ho Song authored at least 76 papers between 1998 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
ISP Agent: A Generalized In-storage-processing Workload Offloading Framework by Providing Multiple Optimization Opportunities.
ACM Trans. Archit. Code Optim., March, 2024

2022
Achieving low write latency through new stealth program operation supporting early write completion in NAND flash memory.
J. Syst. Archit., 2022

Improving NVM Lifetime Using Task Stack Migration on Low-End MCU-Based Devices.
IEEE Access, 2022

A 16/32 Gb/s Dual-Mode NRZ/PAM4 Voltage-Mode Transmitter With 2-Tap FFE.
IEEE Access, 2022

X-SSD: A Storage System with Native Support for Database Logging and Replication.
Proceedings of the SIGMOD '22: International Conference on Management of Data, Philadelphia, PA, USA, June 12, 2022

Avoiding Read Stalls on Flash Storage.
Proceedings of the SIGMOD '22: International Conference on Management of Data, Philadelphia, PA, USA, June 12, 2022

Enhancement of Emulation Usage for NVMe Solid State Drive.
Proceedings of the 19th International SoC Design Conference, 2022

Low Power Decoder Architecture of Product Code for Storage Controller.
Proceedings of the 19th International SoC Design Conference, 2022

ECC-Aided RAID for Reliability Improvement of SSD.
Proceedings of the IEEE Global Communications Conference, 2022

AI Accelerator Embedded Computational Storage for Large-Scale DNN Models.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021
Internal Task-Aware Command Scheduling to Improve Read Performance of Embedded Flash Storage Systems.
IEEE Access, 2021

Binarized Encoder-Decoder Network and Binarized Deconvolution Engine for Semantic Segmentation.
IEEE Access, 2021

Buffer Management With Append-Only Data Isolation for Improving SSD Performance.
IEEE Access, 2021

High Performance Low Power Controller for Data Center SSDs.
Proceedings of the IEEE Hot Chips 33 Symposium, 2021

2020
Cosmos+ OpenSSD: Rapid Prototype for Flash Storage Systems.
ACM Trans. Storage, 2020

Improving Write Performance Through Reliable Asynchronous Operation in Physically-Addressable SSD.
IEEE Access, 2020

GALRU: A Group-Aware Buffer Management Scheme for Flash Storage Systems.
IEEE Access, 2020

Low-Overhead Compressibility Prediction for High-Performance Lossless Data Compression.
IEEE Access, 2020

Level Aware Data Placement Technique for Hybrid NAND Flash Storage of Log-Structured Merge-Tree Based Key-Value Store System.
IEEE Access, 2020

NVDIMM-C: A Byte-Addressable Non-Volatile Memory Module for Compatibility with Standard DDR Memory Interfaces.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

It Takes Two: Instrumenting the Interaction between In-Memory Databases and Solid-State Drives.
Proceedings of the 10th Conference on Innovative Data Systems Research, 2020

2019
Data dependency reduction for high-performance FPGA implementation of DEFLATE compression algorithm.
J. Syst. Archit., 2019

Design of FPGA-Based LZ77 Compressor With Runtime Configurable Compression Ratio and Throughput.
IEEE Access, 2019

2018
Dynamic Transaction Management for System Level Quality-of-Service in Mobile APs.
IEEE Trans. Consumer Electron., 2018

False history filtering for reducing hardware overhead of FPGA-based LZ77 compressor.
J. Syst. Archit., 2018

Design of memory efficient FIFO-based merge sorter.
IEICE Electron. Express, 2018

An analysis of energy consumption under various memory mappings for FRAM-based IoT devices.
Proceedings of the 4th IEEE World Forum on Internet of Things, 2018

2017
Acquisition accuracy enhancement of high-speed storage interface signals.
IEICE Electron. Express, 2017

Impact of processor cache memory on storage performance.
Proceedings of the International SoC Design Conference, 2017

2016
Anti-forensic deletion scheme for flash storage systems.
Proceedings of the IEEE International Conference on Network Infrastructure and Digital Content, 2016

Two-stage analysis of large-scale protocol information in mobile storage systems.
Proceedings of the IEEE International Conference on Network Infrastructure and Digital Content, 2016

2015
Garbage Collection for Low Performance Variation in NAND Flash Storage Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Data loss recovery for power failure in flash memory storage systems.
J. Syst. Archit., 2015

Skewed vertical interleaving scheme to improve data reliability in die-stacked DRAM.
Proceedings of the IEEE International Conference on Consumer Electronics, 2015

2014
Map cache management using dual granularity for mobile storage systems.
IEEE Trans. Consumer Electron., 2014

Data dependency reduction for parallelism enhancement of HEVC decoder.
IEICE Electron. Express, 2014

Design of an application specific instruction set processor for a universal bitstream codec.
IEICE Electron. Express, 2014

Memory data reorganization for performance improvement of HEVC DCT.
Proceedings of the International Conference on Electronics, Information and Communications, 2014

Management scheme of address mapping information for NAND storage system.
Proceedings of the International Conference on Electronics, Information and Communications, 2014

Lifetime enhancement of NAND flash memory-based storage system by bad block reuse scheme.
Proceedings of the International Conference on Electronics, Information and Communications, 2014

2013
LINK-GC: a preemptive approach for garbage collection in NAND flash storages.
Proceedings of the 28th Annual ACM Symposium on Applied Computing, 2013

Device-level voltage control scheme of MLC NAND flash memory for storage power failure recovery.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

Graph-based parallelization algorithm for deblocking filter in H.264/AVC.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

2012
PCRAM-assisted ECC management for enhanced data reliability in flash storage systems.
IEEE Trans. Consumer Electron., 2012

An efficient use of PRAM for an enhancement in the performance and durability of NAND storage systems.
IEEE Trans. Consumer Electron., 2012

A technique to improve garbage collection performance for NAND flash-based storage systems.
IEEE Trans. Consumer Electron., 2012

Exploring parallelization techniques based on OpenMP in H.264/AVC encoder for embedded multi-core processor.
J. Syst. Archit., 2012

Leakage-aware adaptive routing for pipelined on-chip networks in ultra-deep sub-micron technologies.
IEICE Electron. Express, 2012

2011
Architecture exploration of flash memory storage controller through a cycle accurate profiling.
IEEE Trans. Consumer Electron., 2011

2010
A process-aware hot/cold identification scheme for flash memory storage systems.
IEEE Trans. Consumer Electron., 2010

Efficient coordination of parallel threads of H.264/AVC decoder for performance improvement.
IEEE Trans. Consumer Electron., 2010

Write-aware buffer management policy for performance and durability enhancement in NAND flash memory.
IEEE Trans. Consumer Electron., 2010

An efficient management scheme for updating redundant information in flash-based storage system.
Des. Autom. Embed. Syst., 2010

SEPL: Smart Evicted Page List Buffer for NAND Flash Storage System.
Proceedings of the 10th IEEE International Conference on Computer and Information Technology, 2010

2009
Hierarchical use of heterogeneous flash memories for high performance and durability.
IEEE Trans. Consumer Electron., 2009

Implementation of IEEE802.11a software defined receiver on chip multi-processor architecture using OpenMP.
Proceedings of the 2009 International Conference on Hybrid Information Technology, 2009

Performance evaluation of on-chip interconnect IP using CBR traffic generator model.
Proceedings of the 2009 International Conference on Hybrid Information Technology, 2009

Hierarchical architecture of flash-based storage systems for high performance and durability.
Proceedings of the 46th Design Automation Conference, 2009

FRA: a flash-aware redundancy array of flash storage devices.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2007
Design and Implementation of Peripheral Sharing Mechanism on Pervasive Computing with Heterogeneous Environment.
Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2007

A Heuristic Scheduling Algorithm for Parallelism of Massive Iterative Jobs Using Heterogeneous Multiple Processor Systems for High Resource Utilization.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2007

Effective Elimination of Redundant Packets in Wireless Sensor Networks.
Proceedings of the 2007 International Conference on Multimedia and Ubiquitous Engineering (MUE 2007), 2007

2006
A New Methodology of Analyzing Security Vulnerability for Network Services.
Proceedings of the Intelligence and Security Informatics, 2006

Design of a Reliable Hardware Stack to Defend Against Frame Pointer Overwrite Attacks.
Proceedings of the Intelligence and Security Informatics, 2006

Hybrid Modeling for Large-Scale Worm Propagation Simulations.
Proceedings of the Intelligence and Security Informatics, 2006

SONA: An On-Chip Network for Scalable Interconnection of AMBA-Based IPs.
Proceedings of the Computational Science, 2006

2005
Distributed Resolution of Network Congestion and Potential Deadlock Using Reservation-Based Scheduling.
IEEE Trans. Parallel Distributed Syst., 2005

Adaptation Policies for Web Server Intrusion-Tolerant System.
IEICE Trans. Commun., 2005

Secure Contents Distribution Using Flash Memory Technology.
Proceedings of the Intelligence and Security Informatics, 2005

An Adaptive Approach to Handle DoS Attack for Web Services.
Proceedings of the Intelligence and Security Informatics, 2005

2004
Priority-Driven Scheduling and Bandwidth Allocation for MPEG-2 Decoding.
Proceedings of the 30th EUROMICRO Conference 2004, 31 August, 2004

2003
A Progressive Approach to Handling Message-Dependent Deadlock in Parallel Computer Systems.
IEEE Trans. Parallel Distributed Syst., 2003

2002
A New Mechanism for Congestion and Deadlock Resolution.
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002

2001
Efficient Handling of Message-Dependent Deadlock.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

2000
On Message.Dependent Deadlocks in Multiprocessor/Multicomputer Systems.
Proceedings of the High Performance Computing, 2000

1998
Rapid Hardware Prototyping on RPM-2.
IEEE Des. Test Comput., 1998


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