Nikola Katic

According to our database1, Nikola Katic authored at least 12 papers between 2013 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Dual-Tap Computational Photography Image Sensor With Per-Pixel Pipelined Digital Memory for Intra-Frame Coded Multi-Exposure.
IEEE J. Solid State Circuits, 2019

Dual-Tap Pipelined-Code-Memory Coded-Exposure-Pixel CMOS Image Sensor for Multi-Exposure Single-Frame Computational Imaging.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
Coded Two-Bucket Cameras for Computer Vision.
Proceedings of the Computer Vision - ECCV 2018, 2018

2015
A comparative experimental investigation on responsivity and response speed of photo-diode and photo-BJT structures integrated in a low-cost standard CMOS process.
Microelectron. J., 2015

A sub-mW pulse-based 5-bit flash ADC with a time-domain fully-digital reference ladder.
Microelectron. J., 2015

A subthreshold current-sensing ΣΔ modulator for low-voltage and low-power sensor interfaces.
Int. J. Circuit Theory Appl., 2015

Compressive image acquisition in modern CMOS IC design.
Int. J. Circuit Theory Appl., 2015

2014
A 5.43-μW 0.8-V subthreshold current-sensing ΣΔ modulator for low-noise sensor interfaces.
Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014

A retina-inspired robust on-focal-plane multi-band edge-detection scheme for CMOS image sensors.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013
Column-separated compressive sampling scheme for low power CMOS image sensors.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Power-efficient CMOS image acquisition system based on compressive sampling.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

High frame-rate low-power compressive sampling CMOS image sensor architecture: [extended abstract].
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013


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