Nikolaos Vlassopoulos

According to our database1, Nikolaos Vlassopoulos authored at least 21 papers between 2006 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Parallel Memory Accessing for FFT Architectures.
J. Signal Process. Syst., 2018

2014
A Metric for Evolving 2-D Cellular Automata as Pseudo-Random Number Generators.
J. Cell. Autom., 2014

2012
Large-scale Simulations on FPGAs: Finding the Asymptotic Critical Threshold of the Greenberg-Hastings Cellular Automata.
J. Cell. Autom., 2012

A Robust Scheme for Aggregating Quasi-Blind Robots in an Active Environment.
Int. J. Swarm Intell. Res., 2012

Evolution of 2-Dimensional Cellular Automata as Pseudo-random Number Generators.
Proceedings of the Cellular Automata, 2012

2011
A Control-Theoretic Approach for Efficient Design of Filters in DAC and Digital Audio Amplifiers.
Circuits Syst. Signal Process., 2011

Tiled Cellular Automata for Area-efficient Distributed Random Number Generators.
Proceedings of the PECCS 2011, 2011

Clustering behavior of a bio-inspired decentralized aggregation scheme.
Proceedings of the Advances in Artificial Life: 20th Anniversary Edition, 2011

2010
Fully Systolic FFT Architecture for Giga-sample Applications.
J. Signal Process. Syst., 2010

An FPGA design for the stochastic Greenberg-Hastings cellular automata.
Proceedings of the 2010 International Conference on High Performance Computing & Simulation, 2010

2009
Reaction Diffusion and Chemotaxis for Decentralized Gathering on FPGAs.
Int. J. Reconfigurable Comput., 2009

Efficient cascaded VLSI FFT architecture for OFDM systems.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
Conflict-Free Parallel Memory Accessing Techniques for FFT Architectures.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A real-time H.264/AVC VLSI encoder architecture.
J. Real Time Image Process., 2008

A real-time motion estimation FPGA architecture.
J. Real Time Image Process., 2008

Addressing technique for parallel memory accessing in radix-2 FFT processors.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
High Performance 16K, 64K, 256K complex points VLSI Systolic FFT Architectures.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
An approach for efficient design of digital amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Address Generation Techniques for Conflict Free Parallel Memory Accessing in FFT Architectures.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

A High Performance VLSI FFT Architecture.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

An Efficient H.264 VLSI Advanced Video Encoder.
Proceedings of the 13th IEEE International Conference on Electronics, 2006


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