George Lentaris

According to our database1, George Lentaris authored at least 44 papers between 2006 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
High-Performance Vision-Based Navigation on SoC FPGA for Spacecraft Proximity Operations.
IEEE Trans. Circuits Syst. Video Technol., 2020

Fast Packet Classification using RISC-V and HyperSplit Acceleration on FPGA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Combining Arithmetic Approximation Techniques for Improved CNN Circuit Design.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Single- and Multi-FPGA Acceleration of Dense Stereo Vision for Planetary Rovers.
ACM Trans. Embed. Comput. Syst., 2019

In-the-Field Mitigation of Process Variability for Improved FPGA Performance.
IEEE Trans. Computers, 2019

Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution.
J. Real Time Image Process., 2019

Voltage Scaling and Guardband Customization of Multiple Constituent Components in SoC-FPGA.
Proceedings of the 29th International Symposium on Power and Timing Modeling, 2019

Design of a Real-Time DSP Engine on RF-SoC FPGA for 5G Networks.
Proceedings of the Optical Network Design and Modeling, 2019

Analysis of Performance Variation in 16nm FinFET FPGA Devices.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

PVT-Aware Sensing and Voltage Scaling for Energy Efficient FPGAs.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018
Real-Time Carrier Phase Recovery for 16-QAM Utilizing the Nonlinear Least Squares Algorithm.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

Carrier Phase Recovery of 64 GBd Optical 16-QAM Using Extensive Parallelization on an FPGA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Parity Based In-Place FFT Architecture for Continuous Flow Applications.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Parallel Robust Absolute Orientation on FPGA for Vision and Robotics.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

A Framework Exploiting Process Variability to Improve Energy Efficiency in FPGA Applications.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

FPGA SEE Test with Ultra-High Energy Heavy Ions.
Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018


Evaluation Methodology and Reconfiguration Tests on the New European NG-MEDIUM FPGA.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018

2017
A Flexible, High-Performance FPGA Implementation of a Feed-Forward Equalizer for Optical Interconnects up to 112 Gb/s.
J. Signal Process. Syst., 2017

Project HIPNOS: Case Study of High Performance Avionics for Active Debris Removal in Space.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

FPGA acceleration of hyperspectral image processing for high-speed detection applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Application performance improvement by exploiting process variability on FPGA devices.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
HW/SW Codesign and FPGA Acceleration of Visual Odometry Algorithms for Rover Navigation on Mars.
IEEE Trans. Circuits Syst. Video Technol., 2016

Reduced Complexity Superresolution for Low-Bitrate Video Compression.
IEEE Trans. Circuits Syst. Video Technol., 2016

A Co-Design Approach For Rapid Prototyping Of Image Processing On SoC FPGAs.
Proceedings of the 20th Pan-Hellenic Conference on Informatics, 2016

A 56 Gbaud reconfigurable FPGA feed-forward equalizer for optical datacenter networks with flexible baudrate- and modulation-format.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable Platforms.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014
SPARTAN: Developing a Vision System for Future Autonomous Space Exploration Robots.
J. Field Robotics, 2014

Neuronal connectivity assessment for epileptic seizure prevention: Parallelizing the generalized partial directed coherence on many-core platforms.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

2013
Single-image super-resolution using low complexity adaptive iterative back-projection.
Proceedings of the 18th International Conference on Digital Signal Processing, 2013

2012
Design and Comparison of FFT VLSI Architectures for SoC Telecom Applications with Different Flexibility, Speed and Complexity Trade-Offs.
Circuits Syst. Signal Process., 2012

FPGA-based path-planning of high mobility rover for future planetary missions.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Hardware implementation of stereo correspondence algorithm for the ExoMars mission.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

SPARTAN project: On profiling computer vision algorithms for rover navigation.
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012

2011
A Control-Theoretic Approach for Efficient Design of Filters in DAC and Digital Audio Amplifiers.
Circuits Syst. Signal Process., 2011

Study of interpolation filters for motion estimation with application in H.264/AVC encoders.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Configurable baseband digital transceiver for Gbps wireless 60 GHz communications.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Customizing a VLIW Chip Multiprocessor for Motion Estimation Algorithms.
Proceedings of the ARCS 2011, 2011

2010
A Graphics Parallel Memory Organization Exploiting Request Correlations.
IEEE Trans. Computers, 2010

2009
Programmable Motion Estimation architecture.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
A real-time H.264/AVC VLSI encoder architecture.
J. Real Time Image Process., 2008

A real-time motion estimation FPGA architecture.
J. Real Time Image Process., 2008

2006
An approach for efficient design of digital amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An Efficient H.264 VLSI Advanced Video Encoder.
Proceedings of the 13th IEEE International Conference on Electronics, 2006


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