Nusrat Jahan Lisa

According to our database1, Nusrat Jahan Lisa authored at least 10 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
High-Throughput BitPacking Compression.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
Column Scan Acceleration in Hybrid CPU-FPGA Systems.
Proceedings of the International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures, 2018

Column Scan Optimization by Increasing Intra-Instruction Parallelism.
Proceedings of the 7th International Conference on Data Science, 2018

FPGA vs. SIMD: Comparison for Main Memory-Based Fast Column Scan.
Proceedings of the Data Management Technologies and Applications, 2018

2015
Design of a Compact Reversible Carry Look-Ahead Adder Using Dynamic Programming.
Proceedings of the 28th International Conference on VLSI Design, 2015

Design of a Compact Ternary Parallel Adder/Subtractor Circuit in Quantum Computing.
Proceedings of the 2015 IEEE International Symposium on Multiple-Valued Logic, 2015

A compact representation of a quantum controlled ternary barrel shifter.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A compact design of n-bit ripple carry adder circuit using QCA architecture.
Proceedings of the 14th IEEE/ACIS International Conference on Computer and Information Science, 2015

2014
Minimization of a reversible quantum 2<sup>n</sup>-to-n BCD priority encoder.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014

A compact realization of an n-bit quantum carry skip adder circuit with optimal delay.
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014


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