Lucas B. da Silva

According to our database, Lucas B. da Silva authored at least 16 papers between 2017 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Gene regulatory accelerators on cloud FPGA.

Jeronimo Costa Penha, Lucas Bragança, Michael Canesche, Dener Ribeiro, José Augusto Miranda Nacif, Ricardo S. Ferreira

Concurr. Comput. Pract. Exp., 2023

Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime.

Lucas Bragança, Michael Canesche, Jeronimo Costa Penha, Josué Campos, José Augusto Miranda Nacif, Ricardo S. Ferreira

Concurr. Comput. Pract. Exp., 2023

2021

HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions.

Danilo Damião Almeida, Lucas Bragança, Frank Sill Torres, Ricardo Ferreira, José Augusto Miranda Nacif

IEEE Trans. Circuits Syst. II Express Briefs, 2021

An Open Source Custom K-means Generator for AWS Cloud FPGA Accelerators.

Lucas Bragança, Michael Canesche, Jeronimo Costa Penha, Westerley Carvalho, Giovanni Comarela, José Augusto Miranda Nacif, Ricardo S. Ferreira

Proceedings of the XI Brazilian Symposium on Computing Systems Engineering, 2021

RESHAPE: A Run-Time Dataflow Hardware-Based Mapping for CGRA Overlays.

Maria D. Vieira, Michael Canesche, Lucas Bragança, Josué Campos, Mateus Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design.

Michael Canesche, Lucas Bragança, Omar Paranaiba Vilela Neto, José Augusto Miranda Nacif, Ricardo S. Ferreira

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

BloomTime: space-efficient stateful tracking of time-dependent network performance metrics.

Racyus D. G. Pacífico, Lucas B. da Silva, Gerferson R. Coelho, Pablo G. Silva, Alex Borges Vieira, Marcos Augusto M. Vieira, Ítalo S. Cunha, Luiz Filipe M. Vieira, José Augusto Miranda Nacif

Telecommun. Syst., 2020

A Design Exploration of Scalable Mesh-based Fully Pipelined Accelerators.

Westerley Carvalho, Michael Canesche, Lucas Reis, Frank Sill Torres, Lucas B. da Silva, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira

Proceedings of the International Conference on Field-Programmable Technology, 2020

2019

READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications.

Lucas Bragança da Silva, Ricardo S. Ferreira, Michael Canesche, Marcelo M. Menezes, Maria D. Vieira, Jeronimo Costa Penha, Peter Jamieson, José Augusto Miranda Nacif

ACM Trans. Embed. Comput. Syst., 2019

ADD: Accelerator Design and Deploy - A tool for FPGA high-performance dataflow computing.

Jeronimo Costa Penha, Lucas B. da Silva, Jansen Silva, Kristtopher Coelho, Hector P. Baranda, José Augusto Miranda Nacif, Ricardo Ferreira

Concurr. Comput. Pract. Exp., 2019

2018

A GPU/FPGA-Based K-Means Clustering Using a Parameterized Code Generator.

Jeronimo Costa Penha, Lucas Bragança, Kristtopher Coelho, Michael Canesche, Jansen Silva, Giovanni Comarela, José Augusto Miranda Nacif, Ricardo Ferreira

Proceedings of the Symposium on High Performance Computing Systems, 2018

From Java to FPGA: An Experience with the Intel HARP System.

Pedro Caldeira, Jeronimo Costa Penha, Lucas Bragança, Ricardo Ferreira, José Augusto Miranda Nacif, Renato Ferreira, Fernando Magno Quintão Pereira

Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

Simplifying HW/SW integration to deploy multiple accelerators for CPU-FPGA heterogeneous platforms.

Lucas Bragança, Fredy A. M. Alves, Jeronimo Costa Penha, Gabriel T. P. Coimbra, Ricardo Ferreira, José Augusto Miranda Nacif

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Lessons learned on which applications benefit when implemented on CPU-FPGA heterogeneous system.

Fredy A. M. Alves, Peter Jamieson, Lucas Bragança, Ricardo Ferreira, José Augusto Miranda Nacif

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

2017

Exploring the dynamics of large-scale gene regulatory networks using hardware acceleration on a heterogeneous CPU-FPGA platform.

Lucas B. da Silva, Danilo Damião Almeida, José Augusto Miranda Nacif, Ismael Sanchez-Osorio, Carlos A. Hernandez-Martinez, Ricardo Ferreira

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

Designing a collision detection accelerator on a heterogeneous CPU-FPGA platform.

Fredy Augusto M. Alves, Peter Jamieson, Lucas B. da Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017