Olivier Pasquier

According to our database1, Olivier Pasquier authored at least 35 papers between 1992 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2018
High-Level Reliability Evaluation of Reconfiguration-Based Fault Tolerance Techniques.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

2017
Model-driven reliability evaluation for MPSoC design.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

2014
Performance evaluation of an automotive distributed architecture based on a high speed power line communication protocol using a transaction level modeling approach.
J. Real Time Image Process., 2014

Energy consumption modeling of smart nodes with a function approach.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

2013
A Case Study of Simulation and Performance Evaluationof a SDR Baseband Architecture.
J. Signal Process. Syst., 2013

A function approach for simple wireless sensor node energy consumption modeling.
Proceedings of the 2013 Forum on specification and Design Languages, 2013

2012
A State-Based Modeling Approach for Efficient Performance Evaluation of Embedded System Architectures at Transaction Level.
J. Electr. Comput. Eng., 2012

Application of temporal decoupling to the creation of efficient performance models of automotive architectures.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011
A state-based modeling approach for fast performance evaluation of embedded system architectures.
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

A generic execution model for efficient performance evaluation of system architectures at transaction level.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011

Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

A framework for the design of reconfigurable fault tolerant architectures.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Performance evaluation of an automotive distributed architecture based on HPAV communication protocol using a transaction level modeling approach.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
Modeling Technique for Simulation Time Speed-up of Performance Computation in Transaction Level Models.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

2009
Transaction level modeling of a FlexRay communication network.
Proceedings of the Forum on specification and Design Languages, 2009

Transaction level modeling of an adaptive multi-standard and multi-application radio communication system.
Proceedings of the Forum on specification and Design Languages, 2009

2007
Granularity Issues in Transaction Level Modelling Digital Signal Processing Applications.
Proceedings of the Forum on specification and Design Languages, 2007

2006
Hardware Communication Refinement in Digital Signal Processing.
Proceedings of the Forum on specification and Design Languages, 2006

A Computation Core for Communication Refinement of Digital Signal Processing Algorithms.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

A Fully Integrated DC/DC Converter for Tunable RF Filters.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

2004
An Abstract Communication Bus Model for Performance Estimation in SoCs with SystemC (short paper).
Proceedings of the Forum on specification and Design Languages, 2004

A Generic RTOS Model for Real-time Systems Simulation with SystemC.
Proceedings of the 2004 Design, 2004

2003
A Graphical Tool for System-Level Modeling and Simulation with SystemC.
Proceedings of the Forum on specification and Design Languages, 2003

1999
An Interactive Modeling and Generation Tool for the Design of Hw/Sw Systems.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems.
Proceedings of the 1999 Design, 1999

1998
Performance Monitoring and Assessment of Embedded HW/SW Systems.
Des. Autom. Embed. Syst., 1998

A Programmable Multi-Language Generator for CoDesign.
Proceedings of the 1998 Design, 1998

1997
Software Implementation Techniques for Hw/Sw Embedded Systems.
Proceedings of the Fifth International Workshop on Hardware/Software Codesign, 1997

1996
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems.
Proceedings of the Forth International Workshop on Hardware/Software Codesign, 1996

1995
Performance assessment of embedded Hw/Sw systems.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1993
Real-time behavior monitoring for multi-processor systems.
Microprocess. Microprogramming, 1993

1992
A software generator for multi-transputer-based real-time applications.
Microprocess. Microprogramming, 1992

Implementation of statecharts with transputers.
Microprocess. Microprogramming, 1992

A behavior analyzer for real-time and multiprocessor applications.
Proceedings of the Fourth Euromicro workshop on Real-Time Systems, 1992


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