P. V. Ananda Mohan
Orcid: 0000-0002-7246-0108
According to our database1,
P. V. Ananda Mohan
authored at least 35 papers
between 1985 and 2024.
Collaborative distances:
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Bibliography
2024
Circuits Syst. Signal Process., March, 2024
2023
Circuits Syst. Signal Process., April, 2023
Proceedings of the IEEE International Conference on Public Key Infrastructure and its Applications, 2023
2022
Proceedings of the IEEE International Conference on Public Key Infrastructure and its Applications, 2022
2021
Evaluation of Mixed-Radix Digit Computation Techniques for the Three Moduli RNS {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n+1</sup>-1}.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
2018
RNS-to-Binary Converters for New Three-Moduli Sets {2k-3, 2k-2, 2k-1} and {2k+1, 2k+2, 2k+3}.
J. Circuits Syst. Comput., 2018
Reverse Converters for the Moduli Set { \(2^{n}, 2^{n-1}-1, 2^{n}-1, 2^{n+1}-1\}(n\, \hbox {Even})\).
Circuits Syst. Signal Process., 2018
New Reverse converters for the four-moduli set {2<sup>n</sup>, 2<sup>n</sup>-1, 2<sup>n</sup>+1, 2<sup>n-1</sup>-1} for n even.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2017
Circuits Syst. Signal Process., 2017
2016
RNS to Binary Conversion Using Diagonal Function and Pirlo and Impedovo Monotonic Function.
Circuits Syst. Signal Process., 2016
2015
Corrections to "A 0.02 mm<sup>2</sup> 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad".
IEEE J. Solid State Circuits, 2015
2014
Comments on "Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity".
IEEE J. Solid State Circuits, 2014
Circuits Syst. Signal Process., 2014
2013
Comments on "Noise Performance of a Regulated Cascode Transimpedance Amplifier for Radiation Detectors".
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
2012
Circuits Syst. Signal Process., 2012
2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IET Circuits Devices Syst., 2011
2010
Current-mode operational transconductance amplifier-capacitor biquad filter structures based on Tarmy-Ghausi Active-RC filter and second-order digital all-pass filters.
IET Circuits Devices Syst., 2010
Circuits Syst. Signal Process., 2010
Novel First-Order and Second-Order Current-Mode Filters Using Multiple-Output Operational Transconductance Amplifiers.
Circuits Syst. Signal Process., 2010
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
RNS-to-Binary Converters for Two Four-Moduli Sets {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1, 2<sup>n+1</sup>-1} and {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1, 2<sup>n+1</sup>+1}.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
RNS-To-Binary Converter for a New Three-Moduli Set {2<sup>n+1</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>-1}.
IEEE Trans. Circuits Syst. II Express Briefs, 2007
Comments on "A 4th-Order Active- G<sub>m</sub>-RC Reconfigurable (UMTS/WLAN) Filter".
IEEE J. Solid State Circuits, 2007
2005
J. Circuits Syst. Comput., 2005
2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
1999
1996
A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996
1995
J. Circuits Syst. Comput., 1995
Design of a 3-bit Booth recoded novel VLSI concurrent multiplier-accumulator architecture.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995
1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1993
Novel oversampled A/D converters based on error spectrum shaping.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1987
1985
Proc. IEEE, 1985