Pascal Sasdrich

Orcid: 0000-0002-5443-626X

Affiliations:
  • Ruhr University Bochum, Germany


According to our database1, Pascal Sasdrich authored at least 42 papers between 2014 and 2025.

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Bibliography

2025
Multivariate TVLA - Efficient Side-Channel Evaluation Using Confidence Intervals.
IEEE Trans. Computers, March, 2025

HADES: Automated Hardware Design Exploration for Cryptographic Primitives.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025

INDIANA - Verifying (Random) Probing Security Through Indistinguishability Analysis.
Proceedings of the Advances in Cryptology - EUROCRYPT 2025, 2025

2024
Combined Threshold Implementation.
IACR Cryptol. ePrint Arch., 2024

HADES: Automated Hardware Design Exploration for Cryptographic Primitives.
IACR Cryptol. ePrint Arch., 2024

Evaluating an Open-Source Hardware Approach from HDL to GDS for a Security Chip Design - a Review of the Final Stage of Project HEP.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Formal Definition and Verification for Combined Random Fault and Random Probing Security.
Proceedings of the Advances in Cryptology - ASIACRYPT 2024, 2024

2023
Revisiting Fault Adversary Models - Hardware Faults in Theory and Practice.
IEEE Trans. Computers, February, 2023

Challenges and Opportunities of Security-Aware EDA.
ACM Trans. Embed. Comput. Syst., 2023

EasiMask-Towards Efficient, Automated, and Secure Implementation of Masking in Hardware.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Combined Private Circuits - Combined Security Refurbished.
Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, 2023

Recommendation for a Holistic Secure Embedded ISA Extension.
Proceedings of the Applied Cryptography and Network Security, 2023

2022
Risky Translations: Securing TLBs against Timing Side Channels.
IACR Cryptol. ePrint Arch., 2022

VERICA - Verification of Combined Attacks: Automated formal verification of security against simultaneous information leakage and tampering.
IACR Cryptol. ePrint Arch., 2022

Transitional Leakage in Theory and Practice - Unveiling Security Flaws in Masked Circuits.
IACR Cryptol. ePrint Arch., 2022

Randomness Optimization for Gadget Compositions in Higher-Order Masking.
IACR Cryptol. ePrint Arch., 2022

CINI MINIS: Domain Isolation for Fault and Combined Security.
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022

2021
FIVER - Robust Verification of Countermeasures against Fault Injections.
IACR Cryptol. ePrint Arch., 2021

Generic Hardware Private Circuits - Towards Automated Generation of Composable Secure Gadgets.
IACR Cryptol. ePrint Arch., 2021

Automated Generation of Masked Hardware.
IACR Cryptol. ePrint Arch., 2021

A Hard Crystal - Implementing Dilithium on Reconfigurable Hardware.
Proceedings of the Smart Card Research and Advanced Applications, 2021

2020
SKINNY-AEAD and SKINNY-Hash.
IACR Trans. Symmetric Cryptol., 2020

Low-Latency Hardware Masking with Application to AES.
IACR Cryptol. ePrint Arch., 2020

SILVER - Statistical Independence and Leakage Verification.
Proceedings of the Advances in Cryptology - ASIACRYPT 2020, 2020

Concurrent error detection revisited: hardware protection against fault and side-channel attacks.
Proceedings of the ARES 2020: The 15th International Conference on Availability, 2020

2018
Cryptographic hardware agility for physical protection.
PhD thesis, 2018

Exploring RFC 7748 for Hardware Implementation: Curve25519 and Curve448 with Side-Channel Protection.
J. Hardw. Syst. Secur., 2018

Protecting Triple-DES Against DPA - A Practical Application of Domain-Oriented Masking.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2018

Threshold Implementation in Software - Case Study of PRESENT.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2018

2017
Cryptography for Next Generation TLS: Implementing the RFC 7748 Elliptic Curve448 Cryptosystem in Hardware.
Proceedings of the 54th Annual Design Automation Conference, 2017

Hiding Higher-Order Side-Channel Leakage - Randomizing Cryptographic Implementations in Reconfigurable Hardware.
Proceedings of the Topics in Cryptology - CT-RSA 2017, 2017

Bit-Sliding: A Generic Technique for Bit-Serial Implementations of SPN-based Primitives - Applications to AES, PRESENT and SKINNY.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2017, 2017

2016
Closing the Gap in RFC 7748: Implementing Curve448 in Hardware.
IACR Cryptol. ePrint Arch., 2016

White-Box Cryptography in the Gray Box - - A Hardware Implementation and its Side Channels -.
Proceedings of the Fast Software Encryption - 23rd International Conference, 2016

The SKINNY Family of Block Ciphers and Its Low-Latency Variant MANTIS.
Proceedings of the Advances in Cryptology - CRYPTO 2016, 2016

A grain in the silicon: SCA-protected AES in less than 30 slices.
Proceedings of the 27th IEEE International Conference on Application-specific Systems, 2016

2015
Implementing Curve25519 for Side-Channel-Protected Elliptic Curve Cryptography.
ACM Trans. Reconfigurable Technol. Syst., 2015

Affine Equivalence and Its Application to Tightening Threshold Implementations.
Proceedings of the Selected Areas in Cryptography - SAC 2015, 2015

Achieving side-channel protection with dynamic logic reconfiguration on modern FPGAs.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

Side-Channel Protection by Randomizing Look-Up Tables on Reconfigurable Hardware - Pitfalls of Memory Primitives.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2015

2014
THOR - The hardware onion router.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Efficient Elliptic-Curve Cryptography Using Curve25519 on Reconfigurable Devices.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014


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