Paul Peronnard

According to our database, Paul Peronnard authored at least 4 papers between 2003 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions.

Gilles Foucard, Paul Peronnard, Raoul Velazco

J. Electron. Test., 2011

2009

A generic platform for remote accelerated tests and high altitude SEU experiments on advanced ICs: Correlation with MUSCA SEP3 calculations.

Guillaume Hubert, Raoul Velazco, Paul Peronnard

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

2008

Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection.

Vincent Pouget, Alexandre Douin, Gilles Foucard, Paul Peronnard, Dean Lewis, Pascal Fouillat, Raoul Velazco

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2003

Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study.

Bogdan Nicolescu, Paul Peronnard, Raoul Velazco, Yvon Savaria

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003