Raoul Velazco

According to our database, Raoul Velazco authored at least 73 papers between 1982 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2021

Nanosatellite On-Board Computer including a Many-Core Processor.

Fabrice Pancher, Vanessa Vargas, Pablo Ramos, Rodrigo Possamai Bastos, David César Ardiles Saravia, Raoul Velazco

Proceedings of the 22nd IEEE Latin American Test Symposium, 2021

Evaluation of Attitude Estimation Algorithm under Soft Error Effects.

João Paulo Brum, T. Kraemer Sartori, J. Lin, Matheus Garay Trindade, H. Fourati, Raoul Velazco, Rodrigo Possamai Bastos

Proceedings of the 22nd IEEE Latin American Test Symposium, 2021

2019

A Wireless Embedded System for Measuring the Effects of Ionizing Radiations.

Daniel Sánchez, Pablo A. Ferreyra, Juan A. Fraire, Fabian Gomez, Raoul Velazco, Dardo Vinas Viscardi

Proceedings of the IEEE Latin American Test Symposium, 2019

Delay-Tolerant Wireless Networks on Chip: Preliminary Analysis and Results.

Pablo A. Ferreyra, Juan A. Fraire, Fabian Gomez, Raoul Velazco, Daniel Sánchez, Dardo Vinas Viscardi

Proceedings of the IEEE Latin American Test Symposium, 2019

NoCFI: A Hybrid Fault Injection Method for Networks-On-Chip.

Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco

Proceedings of the IEEE Latin American Test Symposium, 2019

2018

A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip.

Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Raoul Velazco

Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

A soft-error resilient route computation unit for 3D Networks-on-Chips.

Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Juan A. Fraire, Raoul Velazco

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Assessing Contact Graph Routing Performance and Reliability in Distributed Satellite Constellations.

Juan A. Fraire, Pablo G. Madoery, Scott C. Burleigh, Marius Feldmann, Jorge M. Finochietto, Amir Charif, Nacer-Eddine Zergainoh, Raoul Velazco

J. Comput. Networks Commun., 2017

Preliminary results of NETFI-2: An automatic method for fault injection on HDL-based designs.

M. Solinas, Alexandre Coelho, Juan A. Fraire, Nacer-Eddine Zergainoh, Pablo A. Ferreyra, Raoul Velazco

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

SEU impact in processor's control-unit: Preliminary results obtained for LEON3 soft-core.

Thierry Bonnoit, Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

Low cost rollback to improve fault-tolerance in VLSI circuits.

Thierry Bonnoit, Nacer-Eddine Zergainoh, Michael Nicolaidis, Raoul Velazco

Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

2016

Towards an efficient SEU effects emulation on SRAM-based FPGAs.

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco

Microelectron. Reliab., 2016

Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs.

Juan Antonio Clemente, Wassim Mansour, Rafic Ayoubi, Felipe Serrano, Hortensia Mecha, Haissam Ziade, Wassim El Falou, Raoul Velazco

Neurocomputing, 2016

Internetworking approaches towards along-track segmented satellite architectures.

Juan A. Fraire, Pablo G. Madoery, Jorge M. Finochietto, Pablo A. Ferreyra, Raoul Velazco

Proceedings of the 2016 IEEE International Conference on Wireless for Space and Extreme Environments, 2016

A deep analysis of SEU consequences in the internal memory of LEON3 processor.

Afef Kchaou, W. El Hadj Youssef, Rached Tourki, Fraidy Bouesse, Pablo Ramos, Raoul Velazco

Proceedings of the 17th Latin-American Test Symposium, 2016

2015

Evaluating SEU fault-injection on parallel applications implemented on multicore processors.

Vanessa Vargas, Pablo Ramos, Raoul Velazco, Jean-François Méhaut, Nacer-Eddine Zergainoh

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis.

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco

Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs.

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco

Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015

2014

SEU fault-injection at system level: Method, tools and preliminary results.

Wassim Mansour, Pablo Ramos, Rafic A. Ayoubi, Raoul Velazco

Proceedings of the 15th Latin American Test Workshop, 2014

Preliminary results of SEU fault-injection on multicore processors in AMP mode.

Vanessa Vargas, Pablo Ramos, Wassim Mansour, Raoul Velazco, Nacer-Eddine Zergainoh, Jean-François Méhaut

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Two complementary approaches for studying the effects of SEUs on HDL-based designs.

Wassim Mansour, Miguel A. Aguirre, Hipólito Guzmán-Miranda, Javier Barrientos Rojas, Raoul Velazco

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

2013

SEU Fault-Injection in VHDL-Based Processors: A Case Study.

Wassim Mansour, Raoul Velazco

J. Electron. Test., 2013

Optimization of a self-converging algorithm at assembly level to improve SEU fault-tolerance.

Greicy Marques-Costa, Wassim Mansour, Fabrice Pancher, Raoul Velazco, Alain Bui, Devan Sohier

Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

Fault-tolerance capabilities of a software-implemented Hopfield Neural Network.

Wassim Mansour, Raoul Velazco, Rafic Ayoubi, Wassim El Falou, Haissam Ziade

Proceedings of the Third International Conference on Communications and Information Technology, 2013

2011

A new fault injection approach to study the impact of bitflips in the configuration of SRAM-based FPGAs.

Haissam Ziade, Rafic A. Ayoubi, Raoul Velazco, Tareck Idriss

Int. Arab J. Inf. Technol., 2011

Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions.

Gilles Foucard, Paul Peronnard, Raoul Velazco

J. Electron. Test., 2011

An Optimal Implementation on FPGA of a Hopfield Neural Network.

Wassim Mansour, Rafic A. Ayoubi, Haissam Ziade, Raoul Velazco, Wassim El Falou

Adv. Artif. Neural Syst., 2011

Robustness with respect to SEUs of a self-converging algorithm.

Raoul Velazco, Gilles Foucard, Fabrice Pancher, Wassim Mansour, Greicy Marques-Costa, Devan Sohier, Alain Bui

Proceedings of the 12th Latin American Test Workshop, 2011

2010

Dependability validation of a cryptoprocessor to SEU effects.

Vladimir Trujillo-Olaya, John M. Espinosa-Duran, Jaime Velasco-Medina, Raoul Velazco

Proceedings of the 11th Latin American Test Workshop, 2010

Bit-flip injection strategies for FSMs modeled in VHDL behavioral level.

John M. Espinosa-Duran, Vladimir Trujillo-Olaya, Jaime Velasco-Medina, Raoul Velazco

Proceedings of the 11th Latin American Test Workshop, 2010

2009

Test and qualification of a Fault Tolerant FPGA based Active Antenna System for space applications.

Ezequiel Brac, Pablo A. Ferreyra, Raoul Velazco, Carlos A. Marqués

Proceedings of the 10th Latin American Test Workshop, 2009

A generic platform for remote accelerated tests and high altitude SEU experiments on advanced ICs: Correlation with MUSCA SEP3 calculations.

Guillaume Hubert, Raoul Velazco, Paul Peronnard

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

2008

Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection.

Vincent Pouget, Alexandre Douin, Gilles Foucard, Paul Peronnard, Dean Lewis, Pascal Fouillat, Raoul Velazco

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2005

How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight.

Raoul Velazco, R. Ecoffet, F. Faure

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

2004

A Survey on Fault Injection Techniques.

Haissam Ziade, Rafic A. Ayoubi, Raoul Velazco

Int. Arab J. Inf. Technol., 2004

Performance Evaluation and Failure Rate Prediction for the Soft Implemented Error Detection Technique.

Bogdan Nicolescu, Yvon Savaria, Raoul Velazco

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

Coupling Different Methodologies to Validate Obsolete Microprocessors.

Lorena Anghel, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Raoul Velazco

Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004

2003

Assessing the Soft Error Rate of Digital Architectures Devoted to Operate in Radiation Environment: A Case Studied.

Raoul Velazco, Sana Rezgui, Haissam Ziade

J. Electron. Test., 2003

A Methodology for Test Replacement Solutions of Obsolete Processors.

Raoul Velazco, Lorena Anghel, S. Saleh

Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

Radiation test methodology for SRAM-based FPGAs by using THESIC.

Monica Alderighi, Fabio Casini, Sergio D'Angelo, F. Faure, Marcello Mancini, Sandro Pastore, Giacomo R. Sechi, Raoul Velazco

Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

SIED: Software Implemented Error Detection.

Bogdan Nicolescu, Yvon Savaria, Raoul Velazco

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study.

Bogdan Nicolescu, Paul Peronnard, Raoul Velazco, Yvon Savaria

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

Preliminary Validation of an Approach Dealing with Processor Obsolescence.

Lorena Anghel, Raoul Velazco, S. Saleh, S. Deswaertes, A. El Moucary

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results.

Bogdan Nicolescu, Raoul Velazco

Proceedings of the 2003 Design, 2003

Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results.

Bogdan Nicolescu, Raoul Velazco

Proceedings of the Embedded Software for SoC, 2003

2002

A Software Fault Tolerance Method for Safety-Critical Systems: Effectiveness and Drawbacks.

Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante

Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller.

Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis

Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

Error Rate Estimation for a Flight Application Using the CEU Fault Injection Approach.

F. Kaddour, Sana Rezgui, Raoul Velazco, S. Rodriguez, J. R. De Mingo

Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

Bit Flip Injection in Processor-Based Architectures: A Case Study.

Gian Carlo Cardarilli, F. Kaddour, A. Leandri, Marco Ottavi, Salvatore Pontarelli, Raoul Velazco

Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

Injecting Bit Flip Faults by Means of a Purely Software Approach: A Case Studied.

Raoul Velazco, A. Corominas, Pablo A. Ferreyra

Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

2001

Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults.

Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis

J. Electron. Test., 2001

Soft Errors and Tolerance for Soft Errors.

Jim Chung, N. Derhacobian, Jean Gasiot, Michael Nicolaidis, David Towne, Raoul Velazco

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Upset-like fault injection in VHDL descriptions: A Method and Preliminary Results.

Raoul Velazco, A. Bragagnini, Oscar Calvo

Proceedings of the 2nd Latin American Test Workshop, 2001

Effectiveness and Limitations of Various Software Techniques for "Soft Error" Detection: A Comparative Study.

Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda

Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

Upset-Like Fault Injection in VHDL Descriptions: A Method and Preliminary Results.

Raoul Velazco, Régis Leveugle, Oscar Calvo

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

System safety through automatic high-level code transformations: an experimental evaluation.

Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Designing a Radiation Hardened 8051-Like Micro-Controller.

Fernanda Gusmão de Lima, Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Ricardo Reis, Raoul Velazco, Sana Rezgui

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

Hardening the Software with Respect to Transient Errors: a Method and Experimental Results.

Ph. Cheynet, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante

Proceedings of the 1st Latin American Test Workshop, 2000

Fault-Tolerance in VHDL Description: Transient-Fault Injection & Early Reliability Estimation.

Fabian Vargas, Alexandre M. Amory, Raoul Velazco

Proceedings of the 1st Latin American Test Workshop, 2000

Transient Bitflip Injection in Microprocessor Embedded Applications.

Raoul Velazco, Sana Rezgui

Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL.

Fabian Vargas, Alexandre M. Amory, Raoul Velazco

Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures.

Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco

Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

1999

Study of Two ANN Digital Implementations of a Radar Detector Candidate to an On-Board Satellite Experiment.

Raoul Velazco, Christelle Godin, Ph. Cheynet, Santiago Torres-Alegre, Diego Andina, Mirka B. Gordon

Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999

1998

Operation in Space of Artificial Neural Networks Implemented by Means of a Dedicated Architecture based on a Transputer.

Raoul Velazco, Ph. Cheynet, R. Ecoffet

Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998

1997

Analysis and Improvement of Neural Network Robustness for On-Board Satellite Image Processing.

Jean-Denis Muller, Ph. Cheynet, Raoul Velazco

Proceedings of the Artificial Neural Networks, 1997

1991

An A Priori Approach to the Evaluation of Signature Analysis Efficiency.

P. Caspi, J. Piotrowski, Raoul Velazco

IEEE Trans. Computers, 1991

1990

Failure coverage of functional test methods: a comparative experimental evaluation.

Raoul Velazco, Catherine Bellon, Bernard Martinet

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

1988

Analysis of Experimental Results on Functional Testing and Diagnosis of Complex Circuits.

Catherine Bellon, Raoul Velazco, Haissam Ziade

Proceedings of the Proceedings International Test Conference 1988, 1988

1985

A Microprocessor Test Approach Allowing Fault Localization.

Raoul Velazco, Haissam Ziade, E. Kolokithas

Proceedings of the Proceedings International Test Conference 1985, 1985

1984

Hardware and Software Tools for Microprocessor Functional Test.

Catherine Bellon, Raoul Velazco

Proceedings of the Proceedings International Test Conference 1984, 1984

Taking into account asynchronous signals in functional test of complex circuits.

Catherine Bellon, Raoul Velazco

Proceedings of the 21st Design Automation Conference, 1984

1982

Test comportemental de microprocesseurs.

Raoul Velazco

PhD thesis, 1982

Automatic generation of microprocessor test programs.

Catherine Bellon, A. Liothin, Sylvain Sadier, Gabriele Saucier, Raoul Velazco, Francois Grillot, M. Issenman

Proceedings of the 19th Design Automation Conference, 1982