Peiyang Kang

According to our database, Peiyang Kang authored at least 6 papers between 2025 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

Lightweight High-Throughput Portable Multi-Mode Reconfigurable Integrated PUF-TRNG.

Xiangyu Dong, Liang Yao, Peng Ding, Jinlin Chen, Mingjing Qiu, Peiyang Kang, Zhengfeng Huang, Yingchun Lu, Huaguo Liang, Yaohua Xu

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2026

A Phase-Walk-Based True Random Number Generator Exploiting Dual-Ring Phase Jitter Comparison.

Liang Yao, Peiyang Kang, Jiahao Zhang, Yaohua Xu, Ying Zhang, Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Yingchun Lu

IEEE Trans. Circuits Syst. II Express Briefs, March, 2026

A Quad-XOR cross-coupled FPGA TRNG with multimodal metastability and application-level validation.

Langyu He, Liang Yao, Yimeng Zhang, Hongying He, Peiyang Kang, Baishun Zhang, Tao Chen, Yaohua Xu

Integr., 2026

A Phase Delay Comparison-Based TRNG Controlled by TDC.

Liang Yao, Peiyang Kang, Jin Yan, Ying Zhang, Yingchun Lu, Huaguo Liang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025

IRCA-TRNG: A Lightweight Dual-Ring Chaotic TRNG With Perturbation Refresh for High Throughput.

Liang Yao, Peiyang Kang, Deqin Shi, Yaohua Xu, Yunlai Zhu, Zhengfeng Huang, Huaguo Liang, Yingchun Lu, Aibin Yan, Ying Zhang

IEEE Trans. Very Large Scale Integr. Syst., December, 2025

Multi-cell lightweight high-throughput TRNG based on selector clock driving and XOR feedback.

Wenjing Zhang, Liang Yao, Yuexin Wei, Wanting Sun, Zhuoyang Li, Peiyang Kang, Zhengfeng Huang, Yingchun Lu

Integr., 2025