Aibin Yan

According to our database, Aibin Yan authored at least 88 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

FeMPIM: A FeFET-Based Multifunctional Processing-in-Memory Cell.

Aibin Yan, Yu Chen, Zhongyu Gao, Tianming Ni, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen

IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.

Aibin Yan, Litao Wang, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Very Large Scale Integr. Syst., January, 2024

A Compact TRNG Design for FPGA Based on the Metastability of RO-driven Shift Registers.

Qingsong Peng, Jingchang Bian, Zhengfeng Huang, Senling Wang, Aibin Yan

ACM Trans. Design Autom. Electr. Syst., January, 2024

2023

Design of True Random Number Generator Based on Multi-Ring Convergence Oscillator Using Short Pulse Enhanced Randomness.

Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Senling Wang, Xiaoqing Wen

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

Overhead Optimized and Quadruple-Node-Upset Self-Recoverable Latch Design Based on Looped C-Element Matrix.

Zhengfeng Huang, Dongxing Ma, Runwu Ji, Huaguo Liang, Aibin Yan, Tai Song, Tianming Ni

IEEE Trans. Aerosp. Electron. Syst., December, 2023

Two sextuple cross-coupled SRAM cells with double-node-upset protection and cost optimization for aerospace applications.

Aibin Yan, Jing Xiang, Yang Chang, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen

Microelectron. J., September, 2023

A Highly Robust and Low-Power Flip-Flop Cell With Complete Double-Node-Upset Tolerance for Aerospace Applications.

Aibin Yan, Yuting He, Xiaoxiao Niu, Jie Cui, Tianming Ni, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Des. Test, August, 2023

Designs of BCD Adder Based on Excess-3 Code in Quantum-Dot Cellular Automata.

Aibin Yan, Runqi Liu, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen, Jiliang Zhang

IEEE Trans. Circuits Syst. II Express Briefs, June, 2023

LDAVPM: A Latch Design and Algorithm-Based Verification Protected Against Multiple-Node-Upsets in Harsh Radiation Environments.

Aibin Yan, Zhixing Li, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.

Aibin Yan, Zhixing Li, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., June, 2023

A Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch.

Zhengfeng Huang, Lanxi Duan, Yan Zhang, Tianming Ni, Aibin Yan

IEEE Trans. Aerosp. Electron. Syst., June, 2023

Low Overhead and High Stability Radiation-Hardened Latch for Double/Triple Node Upsets.

Zhengfeng Huang, Hao Wang, Dongxing Ma, Huaguo Liang, Yiming Ouyang, Aibin Yan

J. Electron. Test., June, 2023

Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications.

Aibin Yan, Aoran Cao, Zhengfeng Huang, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen, Jiliang Zhang

IEEE Trans. Emerg. Top. Comput., 2023

Design of a Novel Latch with Quadruple-Node-Upset Recovery for Harsh Radiation Hardness.

Aibin Yan, Chao Zhou, Shaojie Wei, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2023

A Low Overhead and Double-Node-Upset Self-Recoverable Latch.

Aibin Yan, Fan Xia, Tianming Ni, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2023

Design of A Highly Reliable and Low-Power SRAM With Double-Node Upset Recovery for Safety-critical Applications.

Aibin Yan, Jing Xiang, Zhengfeng Huang, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2023

Design of Low-Cost Approximate CMOS Full Adders.

Aibin Yan, Shaojie Wei, Zhixing Li, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Low Area and Low Delay Latch Design with Complete Double-Node-Upset-Recovery for Aerospace Applications.

Aibin Yan, Shaojie Wei, Jinjun Zhang, Jie Cui, Jie Song, Tianming Ni, Patrick Girard, Xiaoqing Wen

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Two Highly Reliable and High-Speed SRAM Cells for Safety-Critical Applications.

Aibin Yan, Yang Chang, Jing Xiang, Hao Luo, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

BiSTAHL: A Built-In Self-Testable Soft-Error-Hardened Scan-Cell.

Stefan Holst, Ruijun Ma, Xiaoqing Wen, Aibin Yan, Hui Xu

Proceedings of the IEEE European Test Symposium, 2023

A Robust and High-Performance Flip-Flop with Complete Soft-Error Recovery.

Aibin Yan, Xuehua Li, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen

Proceedings of the 10th International Conference on Dependable Systems and Their Applications, 2023

High Performance and DNU-Recovery Spintronic Retention Latch for Hybrid MTJ/CMOS Technology.

Aibin Yan, Zhen Zhou, Liang Ding, Jie Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Advanced DICE Based Triple-Node-Upset Recovery Latch with Optimized Overhead for Space Applications.

Aibin Yan, Xuehua Li, Zhongyu Gao, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

A High-Performance and P-Type FeFET-Based Non-Volatile Latch.

Aibin Yan, Yu Chen, Zhengfeng Huang, Jie Cui, Xiaoqing Wen

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

2022

Novel Quadruple-Node-Upset-Tolerant Latch Designs With Optimized Overhead for Reliable Computing in Harsh Radiation Environments.

Aibin Yan, Zhelong Xu, Xiangfeng Feng, Jie Cui, Zhili Chen, Tianming Ni, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Emerg. Top. Comput., 2022

Cost-Effective and Highly Reliable Circuit-Components Design for Safety-Critical Applications.

Aibin Yan, Zhengzheng Fan, Liang Ding, Jie Cui, Zhengfeng Huang, Qijun Wang, Hao Zheng, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., 2022

A double-node-upset completely tolerant CMOS latch design with extremely low cost for high-performance applications.

Aibin Yan, Kuikui Qian, Tai Song, Zhengfeng Huang, Tianming Ni, Yu Chen, Xiaoqing Wen

Integr., 2022

Machine learning classification algorithm for VLSI test cost reduction.

Tai Song, Zhengfeng Huang, Aibin Yan

Integr., 2022

Evaluation and Test of Production Defects in Hardened Latches.

Ruijun Ma, Stefan Holst, Xiaoqing Wen, Aibin Yan, Hui Xu

IEICE Trans. Inf. Syst., 2022

Broadcast-TDMA: A Cost-Effective Fault-Tolerance Method for TSV Lifetime Reliability Enhancement.

Tianming Ni, Jingchang Bian, Zhao Yang, Mu Nie, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen

IEEE Des. Test, 2022

A Highly Reliable and Low Power RHBD Flip-Flop Cell for Aerospace Applications.

Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

Cost-Optimized and Robust Latch Hardened against Quadruple Node Upsets for Nanoscale CMOS.

Aibin Yan, Shukai Song, Jixiang Zhang, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen, Patrick Girard

Proceedings of the IEEE International Test Conference in Asia, 2022

A Highly Robust, Low Delay and DNU-Recovery Latch Design for Nanoscale CMOS Technology.

Aibin Yan, Zhen Zhou, Shaojie Wei, Jie Cui, Yong Zhou, Tianming Ni, Patrick Girard, Xiaoqing Wen

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

Two 0.8 V, Highly Reliable RHBD 10T and 12T SRAM Cells for Aerospace Applications.

Aibin Yan, Zhihui He, Jing Xiang, Jie Cui, Yong Zhou, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

Sextuple Cross-Coupled-DICE Based Double-Node-Upset Recoverable and Low-Delay Flip-Flop for Aerospace Applications.

Aibin Yan, Yu Chen, Shukai Song, Zijie Zhai, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

SCLCRL: Shuttling C-elements based Low-Cost and Robust Latch Design Protected against Triple Node Upsets in Harsh Radiation Environments.

Aibin Yan, Zhixing Li, Shiwei Huang, Zijie Zhai, Xiangyu Cheng, Jie Cui, Tianming Ni, Xiaoqing Wen, Patrick Girard

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

A Radiation-Hardened Non-Volatile Magnetic Latch with High Reliability and Persistent Storage.

Aibin Yan, Liang Ding, Zhen Zhou, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE 31st Asian Test Symposium, 2022

MRCO: A Multi-ring Convergence Oscillator-based High-Efficiency True Random Number Generator.

Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022

2021

Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS.

Aibin Yan, Chaoping Lai, Yinlei Zhang, Jie Cui, Zhengfeng Huang, Jie Song, Jing Guo, Xiaoqing Wen

IEEE Trans. Emerg. Top. Comput., 2021

A Novel TDMA-Based Fault Tolerance Technique for the TSVs in 3D-ICs Using Honeycomb Topology.

Tianming Ni, Zhao Yang, Hao Chang, Xiaoqiang Zhang, Lin Lu, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen

IEEE Trans. Emerg. Top. Comput., 2021

Intra Coding With Geometric Information for Urban Building Scenes.

Qijun Wang, Aibin Yan, Hua Bao

IEEE Trans. Circuits Syst. Video Technol., 2021

A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC.

Tianming Ni, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications.

Aibin Yan, Zhihui He, Jun Zhou, Jie Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard

Microelectron. J., 2021

Design of Radiation Hardened Latch and Flip-Flop with Cost-Effectiveness for Low-Orbit Aerospace Applications.

Aibin Yan, Aoran Cao, Zhelong Xu, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen

J. Electron. Test., 2021

A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch.

Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

Parallel DICE Cells and Dual-Level CEs based 3-Node-Upset Tolerant Latch Design for Highly Robust Computing.

Aibin Yan, Zijie Zhai, Lele Wang, Jixiang Zhang, Ningning Cui, Tianming Ni, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2021

TPDICE and Sim Based 4-Node-Upset Completely Hardened Latch Design for Highly Robust Computing in Harsh Radiation.

Aibin Yan, Liang Ding, Chuanbo Shan, Haoran Cai, Xiaofeng Chen, Zhanjun Wei, Zhengfeng Huang, Xiaoqing Wen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 4NU-Recoverable and HIS-Insensitive Latch Design for Highly Robust Computing in Harsh Radiation Environments.

Aibin Yan, Aoran Cao, Zhengzheng Fan, Zhelong Xu, Tianming Ni, Patrick Girard, Xiaoqing Wen

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

A Reliable and Low-Cost Flip-Flop Hardened against Double-Node-Upsets.

Aibin Yan, Aoran Cao, Kuikui Qian, Liang Ding, Zhihui He, Zhengzheng Fan, Xiaoqing Wen

Proceedings of the 8th International Conference on Dependable Systems and Their Applications, 2021

2020

Architecture of Cobweb-Based Redundant TSV for Clustered Faults.

Tianming Ni, Dongsheng Liu, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan

IEEE Trans. Very Large Scale Integr. Syst., 2020

Quadruple Cross-Coupled Dual-Interlocked-Storage-Cells-Based Multiple-Node-Upset-Tolerant Latch Designs.

Aibin Yan, Yafei Ling, Jie Cui, Zhili Chen, Zhengfeng Huang, Jie Song, Patrick Girard, Xiaoqing Wen

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Novel Speed-and-Power-Optimized SRAM Cell Designs With Enhanced Self-Recoverability From Single- and Double-Node Upsets.

Aibin Yan, Yan Chen, Yuanjie Hu, Jun Zhou, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen

IEEE Trans. Circuits Syst., 2020

Non-Intrusive Online Distributed Pulse Shrinking-Based Interconnect Testing in 2.5D IC.

Tianming Ni, Hao Chang, Tai Song, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen

IEEE Trans. Circuits Syst., 2020

LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults.

Tianming Ni, Yao Yao, Hao Chang, Lin Lu, Huaguo Liang, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Information Assurance Through Redundant Design: A Novel TNU Error-Resilient Latch for Harsh Radiation Environment.

Aibin Yan, Yuanjie Hu, Jie Cui, Zhili Chen, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen

IEEE Trans. Computers, 2020

A Novel Low-Cost TMR-Without-Voter Based HIS-Insensitive and MNU-Tolerant Latch Design for Aerospace Applications.

Aibin Yan, Zhelong Xu, Kang Yang, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., 2020

Design of a Triple-Node-Upset Self-Recoverable Latch for Aerospace Applications in Harsh Radiation Environments.

Aibin Yan, Xiangfeng Feng, Yuanjie Hu, Chaoping Lai, Jie Cui, Zhili Chen, Kohei Miyase, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., 2020

Design of Double-Upset Recoverable and Transient-Pulse Filterable Latches for Low-Power and Low-Orbit Aerospace Applications.

Aibin Yan, Yan Chen, Zhelong Xu, Zhili Chen, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Trans. Aerosp. Electron. Syst., 2020

Pattern Reorder for Test Cost Reduction Through Improved SVMRANK Algorithm.

Tai Song, Huaguo Liang, Tianming Ni, Zhengfeng Huang, Yingchun Lu, Jinlei Wan, Aibin Yan

IEEE Access, 2020

Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors.

Zhengda Dou, Aibin Yan, Jun Zhou, Yuanjie Hu, Yan Chen, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Test Conference in Asia, 2020

Dual-Interlocked-Storage-Cell-Based Double-Node-Upset Self-Recoverable Flip-Flop Design for Safety-Critical Applications.

Aibin Yan, Zhelong Xu, Jie Cui, Zuobin Ying, Zhengfeng Huang, Huaguo Liang, Patrick Girard, Xiaoqing Wen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

HITTSFL: Design of a Cost-Effective HIS-Insensitive TNU-Tolerant and SET-Filterable Latch for Safety-Critical Applications.

Aibin Yan, Xiangfeng Feng, Xiaohu Zhao, Hang Zhou, Jie Cui, Zuobin Ying, Patrick Girard, Xiaoqing Wen

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

A Sextuple Cross-Coupled SRAM Cell Protected against Double-Node Upsets.

Aibin Yan, Yan Chen, Jun Zhou, Jie Cui, Tianming Ni, Xiaoqing Wen, Patrick Girard

Proceedings of the 29th IEEE Asian Test Symposium, 2020

2019

Novel Double-Node-Upset-Tolerant Memory Cell Designs Through Radiation-Hardening-by-Design and Layout.

Aibin Yan, Zhen Wu, Jing Guo, Jie Song, Xiaoqing Wen

IEEE Trans. Reliab., 2019

A Double-Node-Upset Self-Recoverable Latch Design for High Performance and Low Power Application.

Aibin Yan, Kang Yang, Zhengfeng Huang, Jiliang Zhang, Jie Cui, Xiangsheng Fang, Maoxiang Yi, Xiaoqing Wen

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets.

Aibin Yan, Jun Zhou, Yuanjie Hu, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen

IEEE Access, 2019

Novel Application of Deep Learning for Adaptive Testing Based on Long Short-Term Memory.

Tai Song, Huaguo Liang, Ying Sun, Zhengfeng Huang, Maoxiang Yi, Xiangsheng Fang, Aibin Yan

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

A Novel Triple-Node-Upset-Tolerant CMOS Latch Design using Single-Node-Upset-Resilient Cells.

Zhiyuan Song, Aibin Yan, Jie Cui, Zhili Chen, Xuejun Li, Xiaoqing Wen, Chaoping Lai, Zhengfeng Huang, Huaguo Liang

Proceedings of the IEEE International Test Conference in Asia, 2019

STAHL: A Novel Scan-Test-Aware Hardened Latch Design.

Ruijun Ma, Stefan Holst, Xiaoqing Wen, Aibin Yan, Hui Xu

Proceedings of the 24th IEEE European Test Symposium, 2019

Design of a Novel Self-Recoverable SRAM Cell Protected Against Soft Errors.

Aibin Yan, Jun Zhou, Yuanjie Hu, Yan Chen, Zhen Wu, Tianming Ni

Proceedings of the 6th International Conference on Dependable Systems and Their Applications, 2019

Single-Event Double-Upset Self-Recoverable and Single-Event Transient Pulse Filterable Latch Design for Low Power Applications.

Aibin Yan, Yuanjie Hu, Jie Song, Xiaoqing Wen

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Design of a Sextuple Cross-Coupled SRAM Cell with Optimized Access Operations for Highly Reliable Terrestrial Applications.

Aibin Yan, Zhen Wu, Jun Zhou, Yuanjie Hu, Yan Chen, Zuobin Ying, Xiaoqing Wen, Patrick Girard

Proceedings of the 28th IEEE Asian Test Symposium, 2019

Novel Radiation Hardened Latch Design with Cost-Effectiveness for Safety-Critical Terrestrial Applications.

Aibin Yan, Zhen Wu, Lu Lu, Zhili Chen, Jie Song, Zuobin Ying, Patrick Girard, Xiaoqing Wen

Proceedings of the 28th IEEE Asian Test Symposium, 2019

2018

T2FA: Transparent Two-Factor Authentication.

Jiliang Zhang, Xiao Tan, Xiangqi Wang, Aibin Yan, Zheng Qin

IEEE Access, 2018

Radiation Hardening by Design of a Novel Double-Node-Upset-Tolerant Latch Combined with Layout Technique.

Aibin Yan, Zhile Chen, Zhengfeng Huang, Xiangsheng Fang, Maoxiang Yi, Jing Guo

Proceedings of the IEEE International Test Conference in Asia, 2018

Novel low cost and DNU online self-recoverable RHBD latch design for nanoscale CMOS.

Qian He, Aibin Yan, Chaoping Lai, Yinlei Zhang, Chunming Liu, Zhile Chen, Zhen Wu, Jie Cui, Huaguo Liang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Aging-Temperature-and-Propagation Induced Pulse-Broadening Aware Soft Error Rate Estimation for nano-Scale CMOS.

Aibin Yan, Yafei Ling, Kang Yang, Zhili Chen, Maoxiang Yi

Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017

Double-Node-Upset-Resilient Latch Design for Nanoscale CMOS Technology.

Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Yiming Ouyang, Huaguo Liang

IEEE Trans. Very Large Scale Integr. Syst., 2017

Single event double-upset fully immune and transient pulse filterable latch design for nanoscale CMOS.

Aibin Yan, Zhengfeng Huang, Xiangsheng Fang, Yiming Ouyang, Honghui Deng

Microelectron. J., 2017

A Region-Based Through-Silicon via Repair Method for Clustered Faults.

Tianming Ni, Huaguo Liang, Mu Nie, Xiumin Xu, Aibin Yan, Zhengfeng Huang

IEICE Trans. Electron., 2017

Highly Robust Double Node Upset Resilient Hardened Latch Design.

Huaguo Liang, Xin Li, Zhengfeng Huang, Aibin Yan, Xiumin Xu

IEICE Trans. Electron., 2017

A transient pulse dually filterable and online self-recoverable latch.

Aibin Yan, Huaguo Liang, Yingchun Lu, Zhengfeng Huang

IEICE Electron. Express, 2017

A single event transient detector in SRAM-based FPGAs.

Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yingchun Lu, Aibin Yan, Tianming Ni, Maoxiang Yi

IEICE Electron. Express, 2017

HLDTL: High-performance, low-cost, and double node upset tolerant latch design.

Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Jie Cui, Huaguo Liang

Proceedings of the 35th IEEE VLSI Test Symposium, 2017

2016

An SEU resilient, SET filterable and cost effective latch in presence of PVT variations.

Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xuejun Li

Microelectron. Reliab., 2016

Novel Low Cost and Double Node Upset Tolerant Latch Design for Nanoscale CMOS Technology.

Aibin Yan, Zhengfeng Huang, Xiangsheng Fang, Xiaolin Xu, Huaguo Liang

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2015

A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology.

Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Maoxiang Yi

IEICE Trans. Electron., 2015

2014

Design of a Radiation Hardened Latch for Low-Power Circuits.

Huaguo Liang, Zhi Wang, Zhengfeng Huang, Aibin Yan

Proceedings of the 23rd IEEE Asian Test Symposium, 2014