Yingchun Lu

Orcid: 0000-0002-2621-0933

According to our database1, Yingchun Lu authored at least 30 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
High-efficiency TRNG Design Based on Multi-bit Dual-ring Oscillator.
ACM Trans. Reconfigurable Technol. Syst., December, 2023

Low-overhead TRNG based on MUX for cryptographic protection using multiphase sampling.
J. Supercomput., October, 2023

Electrical activity and synchronization of memristor synapse-coupled HR network based on energy method.
Neurocomputing, August, 2023

Design of approximate Booth multipliers based on error compensation.
Integr., May, 2023

A dynamically reconfigurable entropy source circuit for high-throughput true random number generator.
Microelectron. J., March, 2023

Improvement of cell internal weak defects detection under process variation by optimizing test path and test pattern.
Microelectron. J., 2023

Fault-avoidance C-element based low overhead and TNU-resilient latch.
Microelectron. J., 2023

2022
A router architecture with dual input and dual output channels for Networks-on-Chip.
Microprocess. Microsystems, April, 2022

DCBuf: a high-performance wireless network-on-chip architecture with distributed wireless interconnects and centralized buffer sharing.
Wirel. Networks, 2022

Design of True Random Number Generator Based on Multi-Stage Feedback Ring Oscillator.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

M-RO PUF: A portable pure digital RO PUF based on MUX unit.
Microelectron. J., 2022

A reconfigurable PUF structure with dual working modes based on entropy separation model.
Microelectron. J., 2022

Design of fully adaptive routing and hybrid VC allocation in wireless NOC.
Microelectron. J., 2022

Low-Power Anti-Glitch Double-Edge Triggered Flip-Flop Based on Robust C-Elements.
J. Circuits Syst. Comput., 2022

A reconfigurable test method based on LFSR for 3D stacking integrated circuits.
Integr., 2022

A Low Power-Consumption Triple-Node-Upset-Tolerant Latch Design.
J. Electron. Test., 2022

A Lightweight M_TRNG Design based on MUX Cell Entropy using Multiphase Sampling.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022

2021
Pure Digital Scalable Mixed Entropy Separation Structure for Physical Unclonable Function and True Random Number Generator.
IEEE Trans. Very Large Scale Integr. Syst., 2021

High-Throughput Portable True Random Number Generator Based on Jitter-Latch Structure.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A high reliability physically unclonable function based on multiple tunable ring oscillator.
Microelectron. J., 2021

Design of MNU-Resilient latches based on input-split C-elements.
Microelectron. J., 2021

Design of node separated triple-node-upset self-recoverable latch.
Microelectron. J., 2021

Cross-Layer Dual Modular Redundancy Hardened Scheme of Flip-Flop Design Based on Sense-Amplifier.
J. Circuits Syst. Comput., 2021

Approximate multipliers based on a novel unbiased approximate 4-2 compressor.
Integr., 2021

Neural Network-based Online Fault Diagnosis in Wireless-NoC Systems.
J. Electron. Test., 2021

2020
Pattern Reorder for Test Cost Reduction Through Improved SVMRANK Algorithm.
IEEE Access, 2020

Jitter-Quantizing-Based TRNG Robust Against PVT Variations.
IEEE Access, 2020

2018
An All-Digital and Jitter-Quantizing True Random Number Generator in SRAM-Based FPGAs.
Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017
A transient pulse dually filterable and online self-recoverable latch.
IEICE Electron. Express, 2017

A single event transient detector in SRAM-based FPGAs.
IEICE Electron. Express, 2017


  Loading...