Peter Dahlgren

According to our database, Peter Dahlgren authored at least 20 papers between 1992 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

Social Media and Counter-Democracy: The Contingences of Participation.

Peter Dahlgren

Proceedings of the Electronic Participation - 4th IFIP WG 8.5 International Conference, 2012

2011

Transition test bring-up and diagnosis on UltraSPARC^TM processors.

Liang-Chi Chen, Peter Dahlgren, Paul Dickinson, Scott Davidson

Proceedings of the 2011 IEEE International Test Conference, 2011

2009

Using transition test to understand timing behavior of logic circuits on UltraSPARC^TM T2 family.

Liang-Chi Chen, Paul Dickinson, Peter Dahlgren, Scott Davidson, Olivier Caty, Kevin Wu

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

Transition Test on UltraSPARC- T2 Microprocessor.

Liang-Chi Chen, Paul Dickinson, Prasad Mantri, Murali M. R. Gala, Peter Dahlgren, Subhra Bhattacharya, Olivier Caty, Kevin Woodling, Thomas A. Ziaja, David Curwen, Wendy Yee, Ellen Su, Guixiang Gu, Tim Nguyen

Proceedings of the 2008 IEEE International Test Conference, 2008

2005

Microprocessor silicon debug based on failure propagation tracing.

Olivier Caty, Peter Dahlgren, Ismet Bayraktaroglu

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

2003

Latch Divergency In Microprocessor Failure Analysis.

Peter Dahlgren, Paul Dickinson, Ishwar Parulkar

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

1998

Switch-level bridging fault simulation in the presence of feedbacks.

Peter Dahlgren

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1997

Switch-level modeling of feedback faults using global oscillation control.

Peter Dahlgren

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

1996

A fault model for switch-level simulation of gate-to-drain shorts.

Peter Dahlgren, Peter Lidén

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Oscillation Control in Logic Simulation using Dynamic Dominance Grahps.

Peter Dahlgren

Proceedings of the 33st Conference on Design Automation, 1996

1995

Switch-Level Fault Simulation Based on Local Algorithms.

Peter Dahlgren

PhD thesis, 1995

Switch-level modeling of transistor-level stuck-at faults.

Peter Lidén, Peter Dahlgren

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Coverage of Transistor-Level and Gate-Level Stuck-at Faults in CMOS Checkers.

Peter Lidén, Peter Dahlgren

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A multiple-dominance switch-level model for simulation of short faults.

Peter Dahlgren

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

A Switch-level Algorithm for Simulation of Transients in Combinational Logic.

Peter Dahlgren, Peter Lidén

Proceedings of the Digest of Papers: FTCS-25, 1995

1994

Using heavy-ion radiation to validate fault-handling mechanisms.

Johan Karlsson, Peter Lidén, Peter Dahlgren, Rolf Johansson, Ulf Gunneflo

IEEE Micro, 1994

On Latching Probability of Particle Induced Transients in Combinational Networks.

Peter Lidén, Peter Dahlgren, Rolf Johansson, Johan Karlsson

Proceedings of the Digest of Papers: FTCS/24, 1994

Modeling of Intermediate Node States in switch-Level Networks.

Peter Dahlgren, Peter Lidén

Proceedings of the 31st Conference on Design Automation, 1994

1993

Efficient modeling of switch-level networks containing undetermined logic node states.

Peter Dahlgren, Peter Lidén

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992

Transistor Fault Coverage for Self-Testing CMOS Checkers.

Peter Lidén, Peter Dahlgren, Jan Torin

Proceedings of the Proceedings IEEE International Test Conference 1992, 1992