R. T. Cakici

According to our database, R. T. Cakici authored at least 2 papers between 2003 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

Modeling and Circuit Synthesis for Independently Controlled Double Gate FinFET Devices.

Animesh Datta, Ashish Goel, R. T. Cakici, Hamid Mahmoodi, Dheepa Lekshmanan, Kaushik Roy

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2003

Gate leakage reduction for scaled devices using transistor stacking.

Saibal Mukhopadhyay, Cassondra Neau, R. T. Cakici, Amit Agarwal, Chris H. Kim, Kaushik Roy

IEEE Trans. Very Large Scale Integr. Syst., 2003