Rafael Auler

According to our database1, Rafael Auler authored at least 11 papers between 2012 and 2021.

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Bibliography

2021
Lightning BOLT: powerful, fast, and scalable binary optimization.
Proceedings of the CC '21: 30th ACM SIGPLAN International Conference on Compiler Construction, 2021

2019
BOLT: A Practical Binary Optimizer for Data Centers and Beyond.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019

2017
Handling IoT platform heterogeneity with COISA, a compact OpenISA virtual platform.
Concurr. Comput. Pract. Exp., 2017

The Case for Flexible ISAs: Unleashing Hardware and Software.
Proceedings of the 29th International Symposium on Computer Architecture and High Performance Computing, 2017

2015
SHRINK: reducing the ISA complexity via instruction recycling.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2014
Addressing JavaScript JIT Engines Performance Quirks: A Crowdsourced Adaptive Compiler.
Proceedings of the Compiler Construction - 23rd International Conference, 2014

2013
An automatic energy consumption characterization of processors using ArchC.
J. Syst. Archit., 2013

Assessing computer performance with stocs.
Proceedings of the ACM/SPEC International Conference on Performance Engineering, 2013

Modeling virtual machines misprediction overhead.
Proceedings of the IEEE International Symposium on Workload Characterization, 2013

2012
ACCGen: An Automatic ArchC Compiler Generator.
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012

An ArchC approach for automatic energy consumption characterization of processors.
Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, 2012


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