Rafic Z. Makki

According to our database1, Rafic Z. Makki authored at least 19 papers between 1986 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
Nurturing the Growth of a National Infrastructure in Emerging Technologies.
Proc. IEEE, 2018

2009
On Wires Holding a Handful of Electrons.
Proceedings of the Nano-Net - 4th International ICST Conference, 2009

2006
Scaling of i<sub>DDT</sub> Test Methods for Random Logic Circuits.
J. Electron. Test., 2006

2004
Measurement and Analysis of Physical Defects for Dynamic Supply Current Testing.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004

2002
IDDT Test Methodologies for Very Deep Sub-micron CMOS Circuits.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

I<sub>DDT</sub> Testing of Embedded CMOS SRAMs.
Proceedings of the 2002 Design, 2002

2000
Dynamic Power Supply Current Testing of CMOS SRAMs.
J. Electron. Test., 2000

1998
Testing of Embedded Memories - The Aggregate.
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

Dynamic Power Supply Current Testing of SRAMs.
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1995
Transient power supply current monitoring - A new test method for CMOS VLSI circuits.
J. Electron. Test., 1995

Transient Power Supply Current Testing of Digital CMOS Circuits.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

Power supply current detectability of SRAM defects.
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1992
Testing of static random access memories by monitoring dynamic power supply current.
J. Electron. Test., 1992

A testable static RAM structure for efficient coverage of pattern sensitive faults.
Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992

1991
Automatic Test Pattern Generation with Branch Testing.
IEEE Trans. Computers, 1991

On the Integration of Design and Manufacturing for Improved Testability.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

1990
Practical partitioning for testability with time-shared boundary scan.
Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

SSC-a tool for the synthesis of testable sequential machines.
Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990

1986
Designing Testable Control Paths with Multiple and Feedback Scan-Paths.
Proceedings of the Proceedings International Test Conference 1986, 1986


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