Raguraman Venkatesan

According to our database1, Raguraman Venkatesan authored at least 6 papers between 2000 and 2002.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2002
A physical model for the transient response of capacitively loaded distributed rlc interconnects.
Proceedings of the 39th Design Automation Conference, 2002

2001
Optimal n-tier multilevel interconnect architectures for gigascale integration (GSI).
IEEE Trans. Very Large Scale Integr. Syst., 2001

Impact of three-dimensional architectures on interconnects in gigascale integration.
IEEE Trans. Very Large Scale Integr. Syst., 2001

Interconnect limits on gigascale integration (GSI) in the 21st century.
Proc. IEEE, 2001

2000
Gigascale integration (GSI) interconnect limits and n-tier multilevel interconnect architectural solutions (discussion session).
Proceedings of the Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), 2000

Minimum power and area n-tier multilevel interconnect architectures using optimal repeater insertion.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000


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