Krishna Saraswat

Affiliations:
  • Stanford University, USA


According to our database1, Krishna Saraswat authored at least 18 papers between 1995 and 2020.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 1989, "For contributions to metallization and interconnects for VLSI.".

Timeline

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Bibliography

2020
Doped WS2 transistors with large on-off ratio and high on-current.
Proceedings of the 2020 Device Research Conference, 2020

2019
3D-stacked Strained SiGe/Ge Gate-All-Around (GAA) Structure Fabricated by 3D Ge Condensation.
Proceedings of the Device Research Conference, 2019

2018
Keynote 1: The road to resilient computing in autonomous driving is paved with redundancy.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

2015
50GHz Ge waveguide electro-absorption modulator integrated in a 220nm SOI photonics platform.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

2010
Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs.
Proceedings of the NOCS 2010, 2010

2009
Performance comparison of cu/low-k, carbon nanotube, and optics for on-chip and off-chip interconnects.
Proceedings of the 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), 2009

2008
Performance comparison between copper, carbon nanotube, and optical interconnects.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Modeling of the performance of carbon nanotube bundle, cu/low-k and optical on-chip global interconnects.
Proceedings of the Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), 2007

2004
Self-consistent power/performance/reliability analysis for copper interconnects.
Proceedings of the Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), 2004

Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

2002
Power estimation in global interconnects and its reduction using a novel repeater optimization methodology.
Proceedings of the 39th Design Automation Conference, 2002

2001
Interconnect limits on gigascale integration (GSI) in the 21st century.
Proc. IEEE, 2001

3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration.
Proc. IEEE, 2001

Reliability Studies on Multilevel Interconnection with Intermetal Dielectric Air Gaps.
Microelectron. Reliab., 2001

Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

2000
Performance analysis and technology of 3-D ICs.
Proceedings of the Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), 2000

Multiple Si layer ICs: motivation, performance analysis, and design implications.
Proceedings of the 37th Conference on Design Automation, 2000

1995
Flexible Relation: An Approach for Integrating Data from Multiple, Possibly Inconsistent Databases.
Proceedings of the Eleventh International Conference on Data Engineering, 1995


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