Rajesh Velegalati

According to our database, Rajesh Velegalati authored at least 8 papers between 2009 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance.

Sohrab Aftabjahani, Mark M. Tehranipoor, Farimah Farahmandi, Bulbul Ahmed, Ryan Kastner, Francesco Restuccia, Andres Meza, Kaki Ryan, Nicole Fern, Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Cynthia Sturton, Calvin Deutschbein

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

2013

Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques.

Rajesh Velegalati, Kinjal Shah, Jens-Peter Kaps

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012

Option space exploration using distributed computing for efficient benchmarking of FPGA cryptographic modules.

Benjamin Y. Brewster, Ekawat Homsirikamol, Rajesh Velegalati, Kris Gaj

Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

2011

Improving Security of SDDL Designs through Interleaved Placement on Xilinx FPGAs.

Rajesh Velegalati, Jens-Peter Kaps

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010

Investigation of DPA Resistance of Block RAMs in Cryptographic Implementations on FPGAs.

Shaunak Shah, Rajesh Velegalati, Jens-Peter Kaps, David Hwang

Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Techniques to enable the use of Block RAMs on FPGAS with Dynamic and Differential Logic.

Rajesh Velegalati, Jens-Peter Kaps

Proceedings of the 17th IEEE International Conference on Electronics, 2010

DPA Resistant AES on FPGA Using Partial DDL.

Jens-Peter Kaps, Rajesh Velegalati

Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

2009

DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs.

Rajesh Velegalati, Jens-Peter Kaps

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009