Ramaswami Dandapani

According to our database, Ramaswami Dandapani authored at least 13 papers between 1973 and 2002.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2002

An Implementation of IEEE 1149.1 to Avoid Timing Violations and Other Practical In-Compliance Improvements.

Dave Stang, Ramaswami Dandapani

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

1995

Integration of IEEE Std. 1149.1 and Mixed-Signal Test Architectures.

David J. Cheek, Ramaswami Dandapani

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1994

Coverage metrics for functional tests.

John R. Wallack, Ramaswami Dandapani

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Structure and Metrology for a Single-wire Analog.

Yunsheng Lu, Weiwei Mao, Ramaswami Dandapani, Ravi K. Gulati

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1993

Hard faults diagnosis in analog circuits using sensitivity analysis.

Yunsheng Lu, Ramaswami Dandapani

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

1990

Bridging faults and their implication to PLAs.

V. Chandramouli, Ravi K. Gulati, Ramaswami Dandapani, Deepak K. Goel

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

1988

Built-in self-test for large embedded CMOS folded PLAs.

Ramaswami Dandapani, Ravi K. Gulati, Deepak K. Goel

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1987

Scan Design Using Standard Flip-Flops.

Sudhakar M. Reddy, Ramaswami Dandapani

IEEE Des. Test, 1987

1986

Testable Design of Single-Output Sequential Machines Using Checking Experiments.

Kewal K. Saluja, Ramaswami Dandapani

IEEE Trans. Computers, 1986

An Alternative to Scan Design Methods for Sequential Machines.

Kewal K. Saluja, Ramaswami Dandapani

IEEE Trans. Computers, 1986

1984

Design of Test Pattern Generators for Built-In Test.

Ramaswami Dandapani, Janak H. Patel, Jacob A. Abraham

Proceedings of the Proceedings International Test Conference 1984, 1984

1974

On the Design of Logic Networks with Redundancy and Testability Considerations.

Ramaswami Dandapani, Sudhakar M. Reddy

IEEE Trans. Computers, 1974

1973

Derivation of Minimal Test Sets for Monotonic Logic Circuits.

Ramaswami Dandapani

IEEE Trans. Computers, 1973