Ryan Swann

According to our database, Ryan Swann authored at least 10 papers between 2020 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Fleet: Hierarchical Task-based Abstraction for Megakernels on Multi-Die GPUs.

Sangeeta Chowdhary, Ryan Swann, Sean Siddens, Muhammad Osama, Stephen Neuendorffer, Alexandru Dutu, Karthik Sangaiah, Sandeepa Bhuyan, Samuel Bayliss, Ganesh Dasika

CoRR, April, 2026

2025

tritonBLAS: Triton-based Analytical Approach for GEMM Kernel Parameter Selection.

Ryan Swann, Muhammad Osama, Xiaohu Guo, Bryant Nelson, Lixun Zhang, Alex Brown, Yen Ong, Ali Yazdani, Sean Siddens, Ganesh Dasika, Alex Underwood

CoRR, December, 2025

HipKittens: Fast and Furious AMD Kernels.

William Hu, Drew Wadsworth, Sean Siddens, Stanley Winata, Daniel Y. Fu, Ryan Swann, Muhammad Osama, Christopher Ré, Simran Arora

CoRR, November, 2025

SwizzlePerf: Hardware-Aware LLMs for GPU Kernel Performance Optimization.

Arya Tschand, Muhammad A. Awad, Ryan Swann, Kesavan Ramakrishnan, Jeffrey Jian Ma, Keith Lowery, Ganesh Dasika, Vijay Janapa Reddi

CoRR, August, 2025

Alchemy : A Methodology for Scalable RTL Design Space Exploration.

Ryan Swann, James E. Stine

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

2024

Seer: Predictive Runtime Kernel Selection for Irregular Problems.

Ryan Swann, Muhammad Osama, Karthik Sangaiah, Jalal Mahmud

Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2024

2023

Evaluation of a Modular Approach to AES Hardware Architecture and Optimization.

Ryan Swann, James E. Stine

J. Signal Process. Syst., July, 2023

Parallelization of the Shift and Add Reducer.

Ryan Swann, James E. Stine

Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023

2021

A Reconfigurable Architecture for Improvement and Optimization of Advanced Encryption Standard Hardware.

Ryan Swann, James E. Stine

Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021

2020

An Improved Hardware Architecture for modulo without Multiplication.

Ryan Swann, James E. Stine

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020