Stephen Neuendorffer

According to our database, Stephen Neuendorffer authored at least 28 papers between 2002 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

IRFuzzer: Specialized Fuzzing for LLVM Backend Code Generation.

Yuyang Rong, Zhanghan Yu, Zhenkai Weng, Stephen Neuendorffer, Hao Chen

CoRR, 2024

2023

Special Issue: "AI Acceleration on FPGAs".

Yun Liang, Wei Zhang, Stephen Neuendorffer, Wayne Luk

ACM Trans. Embed. Comput. Syst., November, 2023

SPADES: A Productive Design Flow for Versal Programmable Logic.

Tan Nguyen, Zachary Blair, Stephen Neuendorffer, John Wawrzynek

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture.

Jinming Zhuang, Jason Lau, Hanchen Ye, Zhuoping Yang, Yubo Du, Jack Lo, Kristof Denolf, Stephen Neuendorffer, Alex K. Jones, Jingtong Hu, Deming Chen, Jason Cong, Peipei Zhou

Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

2022

Introduction to Special Issue on FPGAs in Data Centers, Part II.

Ken Eguro, Stephen Neuendorffer, Viktor K. Prasanna, Hongbo Rong

ACM Trans. Reconfigurable Technol. Syst., 2022

Introduction to Special Issue on FPGAs in Data Centers.

Ken Eguro, Stephen Neuendorffer, Viktor K. Prasanna, Hongbo Rong

ACM Trans. Reconfigurable Technol. Syst., 2022

FPGA HLS Today: Successes, Challenges, and Opportunities.

Jason Cong, Jason Lau, Gai Liu, Stephen Neuendorffer, Peichen Pan, Kees A. Vissers, Zhiru Zhang

ACM Trans. Reconfigurable Technol. Syst., 2022

ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation.

Hanchen Ye, Cong Hao, Jianyi Cheng, Hyunmin Jeong, Jack Huang, Stephen Neuendorffer, Deming Chen

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

Compiler-Driven Simulation of Reconfigurable Hardware Accelerators.

Zhijing Li, Yuwei Ye, Stephen Neuendorffer, Adrian Sampson

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

ScaleHLS: a scalable high-level synthesis framework with multi-level transformations and optimizations: invited.

Hanchen Ye, HyeGang Jun, Hyunmin Jeong, Stephen Neuendorffer, Deming Chen

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

ScaleHLS: Scalable High-Level Synthesis through MLIR.

Hanchen Ye, Cong Hao, Jianyi Cheng, Hyunmin Jeong, Jack Huang, Stephen Neuendorffer, Deming Chen

CoRR, 2021

2020

Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine.

Prasanth Chatarasi, Stephen Neuendorffer, Samuel Bayliss, Kees A. Vissers, Vivek Sarkar

Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

2018

Parallel Programming for FPGAs.

Ryan Kastner, Janarbek Matai, Stephen Neuendorffer

CoRR, 2018

2013

Building zynq® accelerators with Vivado® high level synthesis.

Stephen Neuendorffer, Fernando Martinez-Vallina

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

2011

High-Level Synthesis for FPGAs: From Prototyping to Deployment.

Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo Noguera, Kees A. Vissers, Zhiru Zhang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

High level synthesis for FPGAs applied to a sphere decoder channel preprocessor (abstract only).

Sven van Haastregt, Stephen Neuendorffer, Kees A. Vissers, Bart Kienhuis

Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools.

Kees A. Vissers, Stephen Neuendorffer, Juanjo Noguera

Proceedings of the Design, Automation and Test in Europe, 2011

2009

Classes and inheritance in actor-oriented design.

Edward A. Lee, Xiaojun Liu, Stephen Neuendorffer

ACM Trans. Embed. Comput. Syst., 2009

Using C-to-gates to program streaming image processing kernels efficiently on FPGAs.

Kristof Denolf, Stephen Neuendorffer, Kees A. Vissers

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008

Streaming Systems in FPGAs.

Stephen Neuendorffer, Kees A. Vissers

Proceedings of the Embedded Computer Systems: Architectures, 2008

2007

FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing.

Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2006

Combining module selection and resource sharing for efficient FPGA pipeline synthesis.

Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer

Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

2004

Modeling Real-World Control Systems: Beyond Hybrid Systems.

Stephen Neuendorffer

Proceedings of the 36th conference on Winter simulation, 2004

Hierarchical reconfiguration of dataflow models.

Stephen Neuendorffer, Edward A. Lee

Proceedings of the 2nd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2004), 2004

Classes and subclasses in actor-oriented design.

Edward A. Lee, Stephen Neuendorffer

Proceedings of the 2nd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2004), 2004

2003

Taming heterogeneity - the Ptolemy approach.

Johan Eker, Jörn W. Janneck, Edward A. Lee, Jie Liu, Xiaojun Liu, Jozsef Ludvig, Stephen Neuendorffer, Sonia R. Sachs, Yuhong Xiong

Proc. IEEE, 2003

Actor-Oriented Design of Embedded Hardware and Software Systems.

Edward A. Lee, Stephen Neuendorffer, Michael J. Wirthlin

J. Circuits Syst. Comput., 2003

2002

Reprogrammable Platforms for High-Speed Data Acquisition.

Jozsef Ludvig, James G. McCarthy, Stephen Neuendorffer, Sonia R. Sachs

Des. Autom. Embed. Syst., 2002