Saeid Jamili

Orcid: 0009-0003-8624-4048

According to our database1, Saeid Jamili authored at least 7 papers between 2021 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2023
Automatic Hardware Accelerators Reconfiguration through LinearUCB Algorithms on a RISC-V Processor.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

A Universal Hardware Emulator for Verification IPs on FPGA: A Novel and Low-Cost Approach.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023

Heterogeneous Tightly-Coupled Dual Core Architecture Against Single Event Effects.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023

Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023

2022
Implementation of Dynamic Acceleration Unit Exchange on a RISC-V Soft-Processor.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2022

Contextual Bandits Algorithms for Reconfigurable Hardware Accelerators.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2022

2021
L3DAS21 Challenge: Machine Learning for 3D Audio Signal Processing.
Proceedings of the 2021 IEEE 31st International Workshop on Machine Learning for Signal Processing (MLSP), 2021


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