Sanjay Deshpande

Orcid: 0009-0005-0938-9547

According to our database1, Sanjay Deshpande authored at least 12 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Bibliography

2024
SDitH in Hardware.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

2023
Hardware Architecture for a Quantum Computer Trusted Execution Environment.
CoRR, 2023

Analyzing ChatGPT's Aptitude in an Introductory Computer Engineering Course.
CoRR, 2023

A Quantum Computer Trusted Execution Environment.
IEEE Comput. Archit. Lett., 2023

Fast and Efficient Hardware Implementation of HQC.
Proceedings of the Selected Areas in Cryptography - SAC 2023, 2023

Design of Quantum Computer Antivirus.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023

2022
Complete and Improved FPGA Implementation of Classic McEliece.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Towards a Fast and Efficient Hardware Implementation of HQC.
IACR Cryptol. ePrint Arch., 2022

Towards an Antivirus for Quantum Computers.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

2021
Modular Inverse for Integers using Fast Constant Time GCD Algorithm and its Applications.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2017
Analysis and Inner-Round Pipelined Implementation of Selected Parallelizable CAESAR Competition Candidates.
Proceedings of the Euromicro Conference on Digital System Design, 2017

2011
Embedded Multicore Systems: Design Challenges and Opportunities.
Proceedings of the Multiprocessor System-on-Chip - Hardware Design and Tool Integration., 2011


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