Jakub Szefer

Orcid: 0000-0001-9721-3640

Affiliations:
  • Yale University, New Haven, CT, USA


According to our database1, Jakub Szefer authored at least 120 papers between 2009 and 2024.

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Bibliography

2024
Quantum Circuit Reconstruction from Power Side-Channel Attacks on Quantum Computer Controllers.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

SDitH in Hardware.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

Designing Secure TLBs.
IEEE Des. Test, 2024

A Thorough Study of State Leakage Mitigation in Quantum Computing with One-Time Pad.
CoRR, 2024

2023
Cross-VM Covert- and Side-Channel Attacks in Cloud FPGAs.
ACM Trans. Reconfigurable Technol. Syst., March, 2023

ETAP: Energy-aware Timing Analysis of Intermittent Programs.
ACM Trans. Embed. Comput. Syst., March, 2023

Survey of Approaches and Techniques for Security Verification of Computer Systems.
ACM J. Emerg. Technol. Comput. Syst., January, 2023

Abusing Commodity DRAMs in IoT Devices to Remotely Spy on Temperature.
IEEE Trans. Inf. Forensics Secur., 2023

Extending and Defending Attacks on Reset Operations in Quantum Computers.
CoRR, 2023

Classification of Quantum Computer Fault Injection Attacks.
CoRR, 2023

Hardware Architecture for a Quantum Computer Trusted Execution Environment.
CoRR, 2023

Security Evaluation of Thermal Covert-channels on SmartSSDs.
CoRR, 2023

Analyzing ChatGPT's Aptitude in an Introductory Computer Engineering Course.
CoRR, 2023

Exploration of Quantum Computer Power Side-Channels.
CoRR, 2023

A Quantum Computer Trusted Execution Environment.
IEEE Comput. Archit. Lett., 2023

Fast and Efficient Hardware Implementation of HQC.
Proceedings of the Selected Areas in Cryptography - SAC 2023, 2023

Fast Fingerprinting of Cloud-based NISQ Quantum Computers.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023

Design of Quantum Computer Antivirus.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023

Fingerprinting Quantum Computer Equipment.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Covert-channels in FPGA-enabled SmartSSDs.
Proceedings of the International Conference on Field Programmable Technology, 2023

Towards Automated Detection of Single-Trace Side-Channel Vulnerabilities in Constant-Time Cryptographic Code.
Proceedings of the 8th IEEE European Symposium on Security and Privacy, 2023

A Practical Remote Power Attack on Machine Learning Accelerators in Cloud FPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Exploration of Power Side-Channel Vulnerabilities in Quantum Computer Controllers.
Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, 2023

Securing NISQ Quantum Computer Reset Operations Against Higher Energy State Attacks.
Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, 2023

Long-Term Analysis of the Dependability of Cloud-based NISQ Quantum Computers.
Proceedings of the 18th International Conference on Availability, Reliability and Security, 2023

2022
The Future of FPGA Acceleration in Datacenters and the Cloud.
ACM Trans. Reconfigurable Technol. Syst., 2022

Complete and Improved FPGA Implementation of Classic McEliece.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Evaluation of Cache Attacks on Arm Processors and Secure Caches.
IEEE Trans. Computers, 2022

Towards a Fast and Efficient Hardware Implementation of HQC.
IACR Cryptol. ePrint Arch., 2022

Survey of Transient Execution Attacks and Their Mitigations.
ACM Comput. Surv., 2022

Leaky Frontends: Security Vulnerabilities in Processor Frontends.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

Towards an Antivirus for Quantum Computers.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

Securing Reset Operations in NISQ Quantum Computers.
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022

2021
Leaking Information Through Cache LRU States in Commercial Processors and Secure Caches.
IEEE Trans. Computers, 2021

Understanding the Insecurity of Processor Caches Due to Cache Timing-Based Vulnerabilities.
IEEE Secur. Priv., 2021

Power Side-Channel Attacks on BNN Accelerators in Remote FPGAs.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021

DRAM PUFs in Commodity Devices.
IEEE Des. Test, 2021

Leaky Frontends: Micro-Op Cache and Processor Frontend Vulnerabilities.
CoRR, 2021

Deep Freezing Attacks on Capacitors and Electronic Circuits.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2021

Short Paper: Device- and Locality-Specific Fingerprinting of Shared NISQ Quantum Computers.
Proceedings of the HASP '21: Workshop on Hardware and Architectural Support for Security and Privacy, 2021

Practical and Scalable Security Verification of Secure Architectures.
Proceedings of the HASP '21: Workshop on Hardware and Architectural Support for Security and Privacy, 2021

Cross-VM Information Leaks in FPGA-Accelerated Cloud Environments.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

Characterization of IOBUF-based Ring Oscillators.
Proceedings of the International Conference on Field-Programmable Technology, 2021

Modular Inverse for Integers using Fast Constant Time GCD Algorithm and its Applications.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Remote Power Attacks on the Versatile Tensor Accelerator in Multi-Tenant FPGAs.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

Cloud FPGA Cartography using PCIe Contention.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

Chill Out: Freezing Attacks on Capacitors and DC/DC Converters.
Proceedings of the 26th IEEE European Test Symposium, 2021

Remote Power Side-Channel Attacks on BNN Accelerators in FPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

New Predictor-Based Attacks in Processors.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Ultra Freezing Attacks and Clock Glitching of Clock Oscillator Circuits.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2021

2020
Software Protection Using Dynamic PUFs.
IEEE Trans. Inf. Forensics Secur., 2020

Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

The Cost to Break SIKE: A Comparative Hardware-Based Analysis with AES and SHA-3.
IACR Cryptol. ePrint Arch., 2020

Remote Power Side-Channel Attacks on CNN Accelerators in FPGAs.
CoRR, 2020

Survey of Transient Execution Attacks.
CoRR, 2020

C3APSULe: Cross-FPGA Covert-Channel Attacks through Power Supply Unit Leakage.
Proceedings of the 2020 IEEE Symposium on Security and Privacy, 2020

Cloud FPGA Security with RO-Based Primitives.
Proceedings of the International Conference on Field-Programmable Technology, 2020

ASIC Accelerator in 28 nm for the Post-Quantum Digital Signature Scheme XMSS.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Information Leakage from FPGA Routing and Logic Elements.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Leaking Information Through Cache LRU States.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Fingerprinting Cloud FPGA Infrastructures.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Thermal and Voltage Side and Covert Channels and Attacks in Cloud FPGAs.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Pipeline-aware Logic Deduplication in High-Level Synthesis for Post-Quantum Cryptography Algorithms.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

A Benchmark Suite for Evaluating Caches' Vulnerability to Timing Attacks.
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2019
Decay-Based DRAM PUFs in Commodity Devices.
IEEE Trans. Dependable Secur. Comput., 2019

Survey of Microarchitectural Side and Covert Channels, Attacks, and Defenses.
J. Hardw. Syst. Secur., 2019

Analysis of Secure Caches Using a Three-Step Model for Timing-Based Attacks.
J. Hardw. Syst. Secur., 2019

Analysis of Secure Caches and Timing-Based Side-Channel Attacks.
IACR Cryptol. ePrint Arch., 2019

MagneticSpy: Exploiting Magnetometer in Mobile Devices for Website and Application Fingerprinting.
CoRR, 2019

Designing Monitoring Systems for Continuous Certification of Cloud Services: Deriving Meta-requirements and Design Guidelines.
Commun. Assoc. Inf. Syst., 2019

MagneticSpy: Exploiting Magnetometer in Mobile Devices for Website and Application Fingerprinting.
Proceedings of the 18th ACM Workshop on Privacy in the Electronic Society, 2019

Thermal Covert Channels Leveraging Package-on-Package DRAM.
Proceedings of the 18th IEEE International Conference On Trust, 2019

XMSS and Embedded Systems.
Proceedings of the Selected Areas in Cryptography - SAC 2019, 2019

SecChisel Framework for Security Verification of Secure Processor Architectures.
Proceedings of the 8th International Workshop on Hardware and Architectural Support for Security and Privacy, 2019

Secure TLBs.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

Merge-Exchange Sort Based Discrete Gaussian Sampler with Fixed Memory Access Pattern.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Reading Between the Dies: Cross-SLR Covert Channels on Multi-Tenant Cloud FPGAs.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

Dynamic Physically Unclonable Functions.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Measuring Long Wire Leakage with Ring Oscillators in Cloud FPGAs.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

Temporal Thermal Covert Channels in Cloud FPGAs.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Spying on Temperature using DRAM.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Principles of Secure Processor Architecture Design
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01760-5, 2018

XMSS and Embedded Systems - XMSS Hardware Accelerators for RISC-V.
IACR Cryptol. ePrint Arch., 2018

Intrinsic Run-Time Row Hammer PUFs: Leveraging the Row Hammer Effect for Run-Time Cryptography and Improved Security <sup>†</sup>.
Cryptogr., 2018

Cache timing side-channel vulnerability checking with computation tree logic.
Proceedings of the 7th International Workshop on Hardware and Architectural Support for Security and Privacy, 2018

Zero-permission acoustic cross-device tracking.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Post-Quantum Cryptography on FPGAs: The Niederreiter Cryptosystem: Extended Abstract.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2017
FPGA-based Niederreiter Cryptosystem using Binary Goppa Codes.
IACR Cryptol. ePrint Arch., 2017

FPGA-based Key Generator for the Niederreiter Cryptosystem using Binary Goppa Codes.
IACR Cryptol. ePrint Arch., 2017

SecChisel: Language and Tool for Practical and Scalable Security Verification of Security-Aware Hardware Architectures.
IACR Cryptol. ePrint Arch., 2017

Intrinsic Rowhammer PUFs: Leveraging the Rowhammer effect for improved security.
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

2016
Practical DRAM PUFs in Commodity Devices.
IACR Cryptol. ePrint Arch., 2016

Survey of Approaches for Security Verification of Hardware/Software Systems.
IACR Cryptol. ePrint Arch., 2016

Solving large systems of linear equations over GF(2) on FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Design and implementation of open-source SATA III core for Stratix V FPGAs.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

Towards Weakly Consistent Local Storage Systems.
Proceedings of the Seventh ACM Symposium on Cloud Computing, 2016

Run-Time Accessible DRAM PUFs in Commodity Devices.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2016, 2016

Covert channels using mobile device's magnetic field sensors.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Predicting program phases and defending against side-channel attacks using hardware performance counters.
Proceedings of the Fourth Workshop on Hardware and Architectural Support for Security and Privacy, 2015

Hard Drive Side-Channel Attacks Using Smartphone Magnetic Field Sensors.
Proceedings of the Financial Cryptography and Data Security, 2015

Leveraging Processor Performance Counters for Security and Performance.
Proceedings of the 5th International Workshop on Trustworthy Embedded Devices, 2015

2014
SystemWall: An Isolated Firewall Using Hardware-Based Memory Introspection.
Proceedings of the Information Security - 17th International Conference, 2014

Towards fast hardware memory integrity checking with skewed Merkle trees.
Proceedings of the HASP 2014, 2014

Leveraging Virtual Machine Introspection for Hot-Hardening of Arbitrary Cloud-User Applications.
Proceedings of the 6th USENIX Workshop on Hot Topics in Cloud Computing, 2014

Cyber defenses for physical attacks and insider threats in cloud computing.
Proceedings of the 9th ACM Symposium on Information, Computer and Communications Security, 2014

Towards Cloud, Service and Tenant Classification for Cloud Computing.
Proceedings of the 14th IEEE/ACM International Symposium on Cluster, 2014

Hot-hardening: getting more out of your security settings.
Proceedings of the 30th Annual Computer Security Applications Conference, 2014

Hardware-Enhanced Security for Cloud Computing.
Proceedings of the Secure Cloud Computing, 2014

2013
A Framework for Realizing Security on Demand in Cloud Computing.
Proceedings of the IEEE 5th International Conference on Cloud Computing Technology and Science, 2013

Characterizing hypervisor vulnerabilities in cloud computing servers.
Proceedings of the 2013 International Workshop on Security in Cloud Computing, 2013

BitDeposit: Deterring Attacks and Abuses of Cloud Computing Services through Economic Measures.
Proceedings of the 13th IEEE/ACM International Symposium on Cluster, 2013

2012
Security verification of hardware-enabled attestation protocols.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Physical attack protection with human-secure virtualization in data centers.
Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2012

Architectural support for hypervisor-secure virtualization.
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

2011
Rapid single-chip secure processor prototyping on the OpenSPARC FPGA platform.
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

A Case for Hardware Protection of Guest VMs from Compromised Hypervisors in Cloud Computing.
Proceedings of the 31st IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2011 Workshops), 2011

Eliminating the hypervisor attack surface for a more secure cloud.
Proceedings of the 18th ACM Conference on Computer and Communications Security, 2011

2010
NoHype: virtualized cloud infrastructure without the virtualization.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

General-purpose FPGA platform for efficient encryption and hashing.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2009
Tuning instruction customisation for reconfigurable system-on-chip.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009


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