Jim Holt

According to our database, Jim Holt authored at least 27 papers between 2001 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Dynamic Core Allocation and Packet Scheduling in Multicore Network Processors.

Muhammad Faisal Iqbal, Jim Holt, Jee Ho Ryoo, Gustavo de Veciana, Lizy K. John

IEEE Trans. Computers, 2016

2015

MINIME: Pattern-Aware Multicore Benchmark Synthesizer.

Etem Deniz, Alper Sen, Brian Kahne, Jim Holt

IEEE Trans. Computers, 2015

2014

SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering.

Bhavya K. Daya, Chia-Hsin Owen Chen, Suvinay Subramanian, Woo-Cheol Kwon, Sunghyun Park, Tushar Krishna, Jim Holt, Anantha P. Chandrakasan, Li-Shiuan Peh

Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

2013

libEOMP: a portable OpenMP runtime library based on MCA APIs for embedded systems.

Cheng Wang, Sunita Chandrasekaran, Barbara M. Chapman, Jim Holt

Proceedings of the 2013 PPOPP International Workshop on Programming Models and Applications for Multicores and Manycores, 2013

Functional Validation of a New Network Switch Architecture Using Rapid Prototyping Techniques.

Brian Kahne, Jim Holt

Proceedings of the 14th International Workshop on Microprocessor Test and Verification, 2013

Portable mapping of openMP to multicore embedded systems using MCA APIs.

Cheng Wang, Sunita Chandrasekaran, Peng Sun, Barbara M. Chapman, Jim Holt

Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2013

Flow Migration on Multicore Network Processors: Load Balancing While Minimizing Packet Reordering.

Muhammad Faisal Iqbal, Jim Holt, Jee Ho Ryoo, Lizy K. John, Gustavo de Veciance

Proceedings of the 42nd International Conference on Parallel Processing, 2013

Asymmetric scaling on network packet processors in the dark silicon era.

Sourav Roy, Xiaomin Lu, Edmund Gieske, Peng Yang, Jim Holt

Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2013

2012

A full lifecycle performance verification methodology for multicore systems-on-chip.

Jim Holt, Jaideep Dastidar, David Lindberg, John Pape, Peng Yang

ACM Trans. Design Autom. Electr. Syst., 2012

Verification and coverage of message passing multicore applications.

Etem Deniz, Alper Sen, Jim Holt

ACM Trans. Design Autom. Electr. Syst., 2012

Using software architectural patterns for synthetic embedded multicore benchmark development.

Etem Deniz, Alper Sen, Jim Holt, Brian Kahne

Proceedings of the 2012 IEEE International Symposium on Workload Characterization, 2012

Verification coverage of embedded multicore applications.

Etem Deniz, Alper Sen, Jim Holt

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Self-aware computing in the Angstrom processor.

Henry Hoffmann, Jim Holt, George Kurian, Eric Lau, Martina Maggio, Jason E. Miller, Sabrina M. Neuman, Mahmut E. Sinangil, Yildiz Sinangil, Anant Agarwal, Anantha P. Chandrakasan, Srinivas Devadas

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Embedded Multicore Systems: Design Challenges and Opportunities.

Dac Pham, Jim Holt, Sanjay Deshpande

Proceedings of the Multiprocessor System-on-Chip - Hardware Design and Tool Integration., 2011

2009

Software Standards for the Multicore Era.

Jim Holt, Anant Agarwal, Sven Brehmer, Max J. Domeika, Patrick Griffin, Frank Schirrmeister

IEEE Micro, 2009

System-level Performance Verification of Multicore Systems-on-Chip.

Jim Holt, Jaideep Dastidar, David Lindberg, John Pape, Peng Yang

Proceedings of the 10th International Workshop on Microprocessor Test and Verification, 2009

MCC: A runtime verification tool for MCAPI user applications.

Subodh Sharma, Ganesh Gopalakrishnan, Eric Mercer, Jim Holt

Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, 2009

2007

Early Models for System-Level Power Estimation.

Dam Sunwoo, Hassan Al-Sukhni, Jim Holt, Derek Chiou

Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

2003

Arcade: early dynamic property evaluation of requirements using partitioned software architecture models.

K. Suzanne Barber, Thomas J. Graser, Jim Holt, Geoff Baker

Requir. Eng., 2003

Evaluating dynamic correctness properties of domain reference architectures.

K. Suzanne Barber, Thomas J. Graser, Jim Holt

J. Syst. Softw., 2003

Early Multi-Level Software Architecture Performance Evaluations.

K. Suzanne Barber, Jim Holt, Geoff Baker

Proceedings of the Fifteenth International Conference on Software Engineering & Knowledge Engineering (SEKE'2003), 2003

2002

Performance evaluation of domain reference architectures.

K. Suzanne Barber, Jim Holt, Geoff Baker

Proceedings of the 14th international conference on Software engineering and knowledge engineering, 2002

Enabling Iterative Software Architecture Derivation Using Early Non-Functional Property Evaluation.

K. Suzanne Barber, Thomas J. Graser, Jim Holt

Proceedings of the 17th IEEE International Conference on Automated Software Engineering (ASE 2002), 2002

2001

Software Architecture Correctness.

K. Suzanne Barber, Jim Holt

IEEE Softw., 2001

Evaluating Dynamic Correctness Properties of Domain Reference Architectures Using a Combination of Simulation and Model Checking.

K. Suzanne Barber, Thomas J. Graser, Jim Holt

Proceedings of the Thirteenth International Conference on Software Engineering & Knowledge Engineering (SEKE'2001), 2001

Providing Early Feedback in the Development Cycle Through Automated Application of Model Checking to Software Architectures.

K. Suzanne Barber, Thomas J. Graser, Jim Holt

Proceedings of the 16th IEEE International Conference on Automated Software Engineering (ASE 2001), 2001

A Multi-Level Software Architecture Metamodel to Support the Capture and Evaluation of Stakeholder Concerns.

K. Suzanne Barber, Thomas J. Graser, Jim Holt

Proceedings of the World Multiconference on Systemics, Cybernetics and Informatics, 2001