Sanjeev Manhas

Orcid: 0000-0003-3360-9683

Affiliations:
  • Indian Institute of Technology Roorkee (ITT Roorkee), Department of Electronics and Communication Engineering, India


According to our database1, Sanjeev Manhas authored at least 15 papers between 2011 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Weak PUF-Based Variable Latency Obfuscation Technique for ML-Attack Resilient Arbiter PUFs.
IEEE Embed. Syst. Lett., April, 2026

2025
A Unified Approach to a Secure and Lightweight Mutual Authentication Protocol Using Pre-Characterized COTS SRAM ICs for IoT Applications.
ACM Trans. Embed. Comput. Syst., September, 2025

A Hysteretic-Controlled Digital LDO Regulator for Enhanced Load Transient Response.
Proceedings of the 21st International Conference on Synthesis, 2025

2023
A Novel Low-Power Shift-Register Controller for Digital Low-Dropout Regulators.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2022
Highly Non-linear Feed-Forward Arbiter PUF Against Machine Learning Attacks.
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

Design, Simulation and Optimization of Aluminum Nitride Based Accelerometer.
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2021
PCB mounted sensor with high sensitivity SWNT-Based devices for gas sensing applications.
Microelectron. J., 2021

2020
Impact of NBTI Aging on Self-Heating in Nanowire FET.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Fabrication of Microfluidcs Channel with Bilayer Mo Mask and glass bonding using custom design clamp.
Proceedings of the TENCON 2019, 2019

2018
Fabrication of Molybdenum MEMs Structures Using Dry and Wet Etching.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Fabrication of cantilever MEMs structure of C-axis grown AlN film for energy harvester application.
Proceedings of the IEEE International Conference on Industrial Technology, 2018

2017
Vertical Nanowire FET Based Standard Cell Design Employing Verilog-A Compact Model for Higher Performance.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016
A compact ridge cavity resonator for concurrent dual-band applications.
Proceedings of the 11th International Conference on Industrial and Information Systems, 2016

2014
A novel single cavity non-degenerate dual-mode dual-band resonator.
Proceedings of the 2014 International Conference on Advances in Computing, 2014

2011
Efficient nanoscale VLSI standard cell library characterization using a novel delay model.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011


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